On Skylake+, the use of the mask for the compare address is predicated by an instruction flag. On Broadwell, it seems that some engines use the mask and some do not. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112270 Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> --- lib/igt_dummyload.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c index 80b90e1f2..32d4d8d3f 100644 --- a/lib/igt_dummyload.c +++ b/lib/igt_dummyload.c @@ -228,7 +228,8 @@ emit_recursive_batch(igt_spin_t *spin, * For simplicity, we try to stick to a one-size fits all. */ spin->condition = batch + BATCH_SIZE / sizeof(*batch) - 2; - *spin->condition = 0xffffffff; + spin->condition[0] = 0xffffffff; + spin->condition[1] = 0xffffffff; r->presumed_offset = 0; r->target_handle = obj[BATCH].handle; -- 2.24.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
