> -----Original Message-----
> From: Jani Nikula <jani.nikula@xxxxxxxxx>
> Sent: Friday, November 8, 2019 9:10 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Kulkarni, Vandita <vandita.kulkarni@xxxxxxxxx>; Navare, Manasi D
> <manasi.d.navare@xxxxxxxxx>; ville.syrjala@xxxxxxxxxxxxxxx; Nikula, Jani
> <jani.nikula@xxxxxxxxx>
> Subject: [PATCH 9/9] drm/i915/dsi: add support for DSC
>
> Enable DSC for DSI, if specified in VBT.
>
> This is now excessively dynamic, being enabled at compute config. I don't
> expect us to need to switch between DSC and non-DSC for the same panel.
> Cargo culting the DP DSC shows.
>
> Mode valid lacks a sensible implementation, as does get config.
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 75 ++++++++++++++++++++++++--
> 1 file changed, 72 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 8eb2d7f29c82..823dbd9d4d06 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -34,6 +34,7 @@
> #include "intel_ddi.h"
> #include "intel_dsi.h"
> #include "intel_panel.h"
> +#include "intel_vdsc.h"
>
> static inline int header_credits_available(struct drm_i915_private *dev_priv,
> enum transcoder dsi_trans)
> @@ -1050,6 +1051,9 @@ static void gen11_dsi_pre_enable(struct
> intel_encoder *encoder,
> /* step5: program and powerup panel */
> gen11_dsi_powerup_panel(encoder);
>
> + /* FIXME: location? */
> + intel_dsc_enable(encoder, pipe_config);
> +
> /* step6c: configure transcoder timings */
> gen11_dsi_set_transcoder_timings(encoder, pipe_config);
>
> @@ -1211,6 +1215,13 @@ static void gen11_dsi_disable(struct
> intel_encoder *encoder,
> gen11_dsi_disable_io_power(encoder);
> }
>
> +static enum drm_mode_status gen11_dsi_mode_valid(struct
> drm_connector *connector,
> + struct drm_display_mode
> *mode)
> +{
> + /* FIXME: DSC? */
> + return intel_dsi_mode_valid(connector, mode); }
> +
> static void gen11_dsi_get_timings(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config) { @@ -
> 1258,6 +1269,56 @@ static void gen11_dsi_get_config(struct intel_encoder
> *encoder,
> pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc); }
>
> +static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
> + struct intel_crtc_state *pipe_config,
> + struct drm_connector_state
> *conn_state) {
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> + struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
> + struct drm_display_mode *adjusted_mode = &pipe_config-
> >hw.adjusted_mode;
> + int dsc_max_bpc = INTEL_GEN(dev_priv) >= 12 ? 12 : 10;
> + bool use_dsc;
> + int ret;
> +
> + dsc_max_bpc = min_t(int, dsc_max_bpc, conn_state-
> >max_requested_bpc);
> +
> + use_dsc = intel_bios_get_dsc_params(encoder, pipe_config,
> dsc_max_bpc);
> + if (!use_dsc)
> + return 0;
> +
> + if (pipe_config->pipe_bpp < 8 * 3)
> + return -EINVAL;
> +
> + if (adjusted_mode->crtc_clock > dev_priv->max_cdclk_freq) {
> + if (pipe_config->dsc.slice_count > 1) {
> + pipe_config->dsc.dsc_split = true;
> + } else {
> + DRM_DEBUG_KMS("Cannot split stream to use 2
> VDSC instances\n");
> + return -EINVAL;
> + }
> + }
> +
> + vdsc_cfg->convert_rgb = false;
> +
> + ret = intel_dsc_compute_params(encoder, pipe_config);
> + if (ret)
> + return ret;
> +
> + /* DSI specific sanity checks on the common code */
> + WARN_ON(vdsc_cfg->vbr_enable);
> + WARN_ON(vdsc_cfg->pic_width % vdsc_cfg->slice_width);
> + WARN_ON(vdsc_cfg->slice_height < 8);
> + WARN_ON(vdsc_cfg->pic_height % vdsc_cfg->slice_height);
> +
> + ret = drm_dsc_compute_rc_parameters(vdsc_cfg);
> + if (ret)
> + return ret;
> +
> + pipe_config->dsc.compression_enable = true;
> +
As per the spec, I see that it asks us to program horizontal timings in video mode and use the compressed frequency ratio like burst mode, but it is a bit ambiguous if it is talking about non-burst mode.
We will have to add htotal, hsync_start and hsync_end calculation, if yes.
Thanks,
Vandita
> + return 0;
> +}
> +
> static int gen11_dsi_compute_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state)
> @@ -1286,14 +1347,22 @@ static int gen11_dsi_compute_config(struct
> intel_encoder *encoder,
> pipe_config->clock_set = true;
> pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5;
>
> + if (gen11_dsi_dsc_compute_config(encoder, pipe_config,
> conn_state))
> + DRM_DEBUG_KMS("Attempting to use DSC failed\n");
> +
> return 0;
> }
>
> static void gen11_dsi_get_power_domains(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state) {
> - get_dsi_io_power_domains(to_i915(encoder->base.dev),
> - enc_to_intel_dsi(&encoder->base));
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> + get_dsi_io_power_domains(i915, enc_to_intel_dsi(&encoder-
> >base));
> +
> + if (crtc_state->dsc.compression_enable)
> + intel_display_power_get(i915,
> +
> intel_dsc_power_domain(crtc_state));
> }
>
> static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder, @@ -
> 1360,7 +1429,7 @@ static const struct drm_connector_funcs
> gen11_dsi_connector_funcs = {
>
> static const struct drm_connector_helper_funcs
> gen11_dsi_connector_helper_funcs = {
> .get_modes = intel_dsi_get_modes,
> - .mode_valid = intel_dsi_mode_valid,
> + .mode_valid = gen11_dsi_mode_valid,
> .atomic_check = intel_digital_connector_atomic_check,
> };
>
> --
> 2.20.1
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