On Tue, 2019-11-12 at 12:46 +0200, Imre Deak wrote: > According to internal documents I found for CMP PCHs the PCI ID > 0xA3C1 > belongs to a CMP-V chipset. Based on the same docs the programming of > the PCH is compatible with that of KBP. Fix up my previous wrong > assumption accordingly using the SPT programming which in turn is the > basis for KBP. > > The original bug reporter verified that this is the correct PCH > identification (the only way we'll program valid DDC pin-pair values > to > the GMBUS register) and the Windows team uses the same identification > (that is using the KBP programming model for this PCH). > > I filed the necessary Bspec update requests (BSpec/33734). Reviewed-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112051 > Fixes: 37c92dc303dd ("drm/i915: Add new CNL PCH ID seen on a CML > platform") > Reported-and-tested-by: Cyrus <cyrus.lien@xxxxxxxxxxxxx> > Cc: Cyrus <cyrus.lien@xxxxxxxxxxxxx> > Cc: Timo Aaltonen <tjaalton@xxxxxxxxxx> > Cc: José Roberto de Souza <jose.souza@xxxxxxxxx> > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pch.c | 6 +++++- > drivers/gpu/drm/i915/intel_pch.h | 2 +- > 2 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pch.c > b/drivers/gpu/drm/i915/intel_pch.c > index fd22355b9a96..43b68b5fc562 100644 > --- a/drivers/gpu/drm/i915/intel_pch.c > +++ b/drivers/gpu/drm/i915/intel_pch.c > @@ -62,7 +62,6 @@ intel_pch_type(const struct drm_i915_private > *dev_priv, unsigned short id) > /* KBP is SPT compatible */ > return PCH_SPT; > case INTEL_PCH_CNP_DEVICE_ID_TYPE: > - case INTEL_PCH_CNP2_DEVICE_ID_TYPE: > DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n"); > WARN_ON(!IS_CANNONLAKE(dev_priv) && > !IS_COFFEELAKE(dev_priv)); > return PCH_CNP; > @@ -76,6 +75,11 @@ intel_pch_type(const struct drm_i915_private > *dev_priv, unsigned short id) > WARN_ON(!IS_COFFEELAKE(dev_priv)); > /* CometPoint is CNP Compatible */ > return PCH_CNP; > + case INTEL_PCH_CMP_V_DEVICE_ID_TYPE: > + DRM_DEBUG_KMS("Found Comet Lake V PCH (CMP-V)\n"); > + WARN_ON(!IS_COFFEELAKE(dev_priv)); > + /* Comet Lake V PCH is based on KBP, which is SPT > compatible */ > + return PCH_SPT; > case INTEL_PCH_ICP_DEVICE_ID_TYPE: > DRM_DEBUG_KMS("Found Ice Lake PCH\n"); > WARN_ON(!IS_ICELAKE(dev_priv)); > diff --git a/drivers/gpu/drm/i915/intel_pch.h > b/drivers/gpu/drm/i915/intel_pch.h > index 52d145dcdb15..3053d1ce398b 100644 > --- a/drivers/gpu/drm/i915/intel_pch.h > +++ b/drivers/gpu/drm/i915/intel_pch.h > @@ -40,10 +40,10 @@ enum intel_pch { > #define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE 0x9D00 > #define INTEL_PCH_KBP_DEVICE_ID_TYPE 0xA280 > #define INTEL_PCH_CNP_DEVICE_ID_TYPE 0xA300 > -#define INTEL_PCH_CNP2_DEVICE_ID_TYPE 0xA380 > #define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE 0x9D80 > #define INTEL_PCH_CMP_DEVICE_ID_TYPE 0x0280 > #define INTEL_PCH_CMP2_DEVICE_ID_TYPE 0x0680 > +#define INTEL_PCH_CMP_V_DEVICE_ID_TYPE 0xA380 > #define INTEL_PCH_ICP_DEVICE_ID_TYPE 0x3480 > #define INTEL_PCH_MCC_DEVICE_ID_TYPE 0x4B00 > #define INTEL_PCH_TGP_DEVICE_ID_TYPE 0xA080 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
