Because DP ports don't use set_infoframes() / intel_write_infoframe()
machanisms, DP ports requires a handling of enabling/disabling of each
Video DIP when a changing usage of video DIP for SDP transmission such as
whether or not to use HDR.
For now it only adds enable_infoframe() callback for hsw platform.
v2: Minor style fix
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@xxxxxxxxx>
---
.../drm/i915/display/intel_display_types.h | 4 +++
drivers/gpu/drm/i915/display/intel_hdmi.c | 36 +++++++++++++++++++
drivers/gpu/drm/i915/display/intel_hdmi.h | 3 ++
3 files changed, 43 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index bac40482a2aa..a541c8cc8d83 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1305,6 +1305,10 @@ struct intel_digital_port {
const struct intel_crtc_state *crtc_state,
unsigned int type,
void *frame, ssize_t len);
+ void (*enable_infoframe)(struct intel_encoder *encoder,
+ bool enable,
+ const struct intel_crtc_state *crtc_state,
+ unsigned int type);
void (*set_infoframes)(struct intel_encoder *encoder,
bool enable,
const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index b54ccbb5aad5..b62afeccd44e 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -559,6 +559,24 @@ static void hsw_read_infoframe(struct intel_encoder *encoder,
type, i >> 2));
}
+static void hsw_enable_infoframe(struct intel_encoder *encoder,
+ bool enable,
+ const struct intel_crtc_state *crtc_state,
+ unsigned int type)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder);
+ u32 val = I915_READ(ctl_reg);
+
+ if (enable)
+ val |= hsw_infoframe_enable(type);
+ else
+ val &= ~hsw_infoframe_enable(type);
+
+ I915_WRITE(ctl_reg, val);
+ POSTING_READ(ctl_reg);
+}
+
static u32 hsw_infoframes_enabled(struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config)
{
@@ -586,6 +604,23 @@ static const u8 infoframe_type_to_idx[] = {
HDMI_INFOFRAME_TYPE_DRM,
};
+void intel_enable_infoframe(struct intel_encoder *encoder,
+ bool enable,
+ const struct intel_crtc_state *crtc_state,
+ unsigned int type)
+{
+ struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
+
+ if (dig_port->enable_infoframe) {
+ dig_port->enable_infoframe(encoder, enable, crtc_state, type);
+ } else {
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+
+ DRM_DEBUG_KMS("GEN%d enable_infoframe() callback is not implemented!",
+ INTEL_GEN(dev_priv));
+ }
+}
+
u32 intel_hdmi_infoframe_enable(unsigned int type)
{
int i;
@@ -3104,6 +3139,7 @@ void intel_infoframe_init(struct intel_digital_port *intel_dig_port)
} else {
intel_dig_port->write_infoframe = hsw_write_infoframe;
intel_dig_port->read_infoframe = hsw_read_infoframe;
+ intel_dig_port->enable_infoframe = hsw_enable_infoframe;
intel_dig_port->set_infoframes = hsw_set_infoframes;
intel_dig_port->infoframes_enabled = hsw_infoframes_enabled;
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
index cf1ea5427639..86f925526514 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.h
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
@@ -48,5 +48,8 @@ void intel_read_infoframe(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
enum hdmi_infoframe_type type,
union hdmi_infoframe *frame);
+void intel_enable_infoframe(struct intel_encoder *encoder, bool enable,
+ const struct intel_crtc_state *crtc_state,
+ unsigned int type);
#endif /* __INTEL_HDMI_H__ */
--
2.23.0
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