On Fri, 25 Oct 2019, Lee Shawn C <shawn.c.lee@xxxxxxxxx> wrote:
> U series device need different DDI buffer setup for eDP
> and DP. If driver did not recognize ULT id proerply.
> The setting for H and S series would be used.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
> Cc: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
> Cc: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx>
> Cc: Cooper Chiou <cooper.chiou@xxxxxxxxx>
> Signed-off-by: Lee Shawn C <shawn.c.lee@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_pci.c | 2 ++
> drivers/gpu/drm/i915/intel_device_info.c | 2 ++
> include/drm/i915_pciids.h | 20 +++++++++++++-------
> 3 files changed, 17 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index bd9211b3d76e..e876621f6aaf 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -863,6 +863,8 @@ static const struct pci_device_id pciidlist[] = {
> INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> INTEL_CML_GT1_IDS(&intel_coffeelake_gt1_info),
> INTEL_CML_GT2_IDS(&intel_coffeelake_gt2_info),
> + INTEL_CML_U_GT1_IDS(&intel_coffeelake_gt1_info),
> + INTEL_CML_U_GT2_IDS(&intel_coffeelake_gt2_info),
> INTEL_CNL_IDS(&intel_cannonlake_info),
> INTEL_ICL_11_IDS(&intel_icelake_11_info),
> INTEL_EHL_IDS(&intel_elkhartlake_info),
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index f99c9fd497b2..82d3b193eaec 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -775,6 +775,8 @@ static const u16 subplatform_ult_ids[] = {
> INTEL_WHL_U_GT1_IDS(0),
> INTEL_WHL_U_GT2_IDS(0),
> INTEL_WHL_U_GT3_IDS(0),
> + INTEL_CML_U_GT1_IDS(0),
> + INTEL_CML_U_GT2_IDS(0)
Missing comma at the end.
BR,
Jani.
> };
>
> static const u16 subplatform_ulx_ids[] = {
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 56e823cdc717..02f10c4f5ec7 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -446,24 +446,28 @@
>
> /* CML GT1 */
> #define INTEL_CML_GT1_IDS(info) \
> - INTEL_VGA_DEVICE(0x9B21, info), \
> - INTEL_VGA_DEVICE(0x9BAA, info), \
> - INTEL_VGA_DEVICE(0x9BAC, info), \
> INTEL_VGA_DEVICE(0x9BA5, info), \
> INTEL_VGA_DEVICE(0x9BA8, info), \
> INTEL_VGA_DEVICE(0x9BA4, info), \
> INTEL_VGA_DEVICE(0x9BA2, info)
>
> +#define INTEL_CML_U_GT1_IDS(info) \
> + INTEL_VGA_DEVICE(0x9B21, info), \
> + INTEL_VGA_DEVICE(0x9BAA, info), \
> + INTEL_VGA_DEVICE(0x9BAC, info)
> +
> /* CML GT2 */
> #define INTEL_CML_GT2_IDS(info) \
> - INTEL_VGA_DEVICE(0x9B41, info), \
> - INTEL_VGA_DEVICE(0x9BCA, info), \
> - INTEL_VGA_DEVICE(0x9BCC, info), \
> INTEL_VGA_DEVICE(0x9BC5, info), \
> INTEL_VGA_DEVICE(0x9BC8, info), \
> INTEL_VGA_DEVICE(0x9BC4, info), \
> INTEL_VGA_DEVICE(0x9BC2, info)
>
> +#define INTEL_CML_U_GT2_IDS(info) \
> + INTEL_VGA_DEVICE(0x9B41, info), \
> + INTEL_VGA_DEVICE(0x9BCA, info), \
> + INTEL_VGA_DEVICE(0x9BCC, info)
> +
> #define INTEL_KBL_IDS(info) \
> INTEL_KBL_GT1_IDS(info), \
> INTEL_KBL_GT2_IDS(info), \
> @@ -529,7 +533,9 @@
> INTEL_WHL_U_GT3_IDS(info), \
> INTEL_AML_CFL_GT2_IDS(info), \
> INTEL_CML_GT1_IDS(info), \
> - INTEL_CML_GT2_IDS(info)
> + INTEL_CML_GT2_IDS(info), \
> + INTEL_CML_U_GT1_IDS(info), \
> + INTEL_CML_U_GT2_IDS(info)
>
> /* CNL */
> #define INTEL_CNL_PORT_F_IDS(info) \
--
Jani Nikula, Intel Open Source Graphics Center
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