Quoting Tvrtko Ursulin (2019-10-24 10:34:40)
> From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
>
> One more thing which relied on implicit dev_priv can be covnerted to use
> the new mmio accessors.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 98 +++++++++++++++++------------
> 1 file changed, 59 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 3148d5946b63..3d3a8db18a07 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2922,35 +2922,51 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
> return 0;
> }
>
> -static void tgl_setup_private_ppat(struct drm_i915_private *dev_priv)
> +static void tgl_setup_private_ppat(struct intel_uncore *uncore)
> {
> /* TGL doesn't support LLC or AGE settings */
> - I915_WRITE(GEN12_PAT_INDEX(0), GEN8_PPAT_WB);
> - I915_WRITE(GEN12_PAT_INDEX(1), GEN8_PPAT_WC);
> - I915_WRITE(GEN12_PAT_INDEX(2), GEN8_PPAT_WT);
> - I915_WRITE(GEN12_PAT_INDEX(3), GEN8_PPAT_UC);
> - I915_WRITE(GEN12_PAT_INDEX(4), GEN8_PPAT_WB);
> - I915_WRITE(GEN12_PAT_INDEX(5), GEN8_PPAT_WB);
> - I915_WRITE(GEN12_PAT_INDEX(6), GEN8_PPAT_WB);
> - I915_WRITE(GEN12_PAT_INDEX(7), GEN8_PPAT_WB);
> -}
> -
> -static void cnl_setup_private_ppat(struct drm_i915_private *dev_priv)
> -{
> - I915_WRITE(GEN10_PAT_INDEX(0), GEN8_PPAT_WB | GEN8_PPAT_LLC);
> - I915_WRITE(GEN10_PAT_INDEX(1), GEN8_PPAT_WC | GEN8_PPAT_LLCELLC);
> - I915_WRITE(GEN10_PAT_INDEX(2), GEN8_PPAT_WT | GEN8_PPAT_LLCELLC);
> - I915_WRITE(GEN10_PAT_INDEX(3), GEN8_PPAT_UC);
> - I915_WRITE(GEN10_PAT_INDEX(4), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(0));
> - I915_WRITE(GEN10_PAT_INDEX(5), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(1));
> - I915_WRITE(GEN10_PAT_INDEX(6), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(2));
> - I915_WRITE(GEN10_PAT_INDEX(7), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3));
> + intel_uncore_write(uncore, GEN12_PAT_INDEX(0), GEN8_PPAT_WB);
> + intel_uncore_write(uncore, GEN12_PAT_INDEX(1), GEN8_PPAT_WC);
> + intel_uncore_write(uncore, GEN12_PAT_INDEX(2), GEN8_PPAT_WT);
> + intel_uncore_write(uncore, GEN12_PAT_INDEX(3), GEN8_PPAT_UC);
> + intel_uncore_write(uncore, GEN12_PAT_INDEX(4), GEN8_PPAT_WB);
> + intel_uncore_write(uncore, GEN12_PAT_INDEX(5), GEN8_PPAT_WB);
> + intel_uncore_write(uncore, GEN12_PAT_INDEX(6), GEN8_PPAT_WB);
> + intel_uncore_write(uncore, GEN12_PAT_INDEX(7), GEN8_PPAT_WB);
> +}
...
> @@ -3078,7 +3096,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
>
> ggtt->vm.pte_encode = gen8_pte_encode;
>
> - setup_private_pat(dev_priv);
> + setup_private_pat(ggtt->vm.gt->uncore);
>
> return ggtt_probe_common(ggtt, size);
> }
> @@ -3382,10 +3400,12 @@ static void ggtt_restore_mappings(struct i915_ggtt *ggtt)
>
> void i915_gem_restore_gtt_mappings(struct drm_i915_private *i915)
> {
> - ggtt_restore_mappings(&i915->ggtt);
> + struct i915_ggtt *ggtt = &i915->ggtt;
> +
> + ggtt_restore_mappings(ggtt);
>
> if (INTEL_GEN(i915) >= 8)
> - setup_private_pat(i915);
> + setup_private_pat(ggtt->vm.gt->uncore);
Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
-Chris
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