Re: ✗ Fi.CI.BAT: failure for drm/i915/tgl: whitelist PS_(DEPTH|INVOCATION)_COUNT

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Quoting Tapani Pälli (2019-10-24 07:39:50)
> 
> 
> On 10/24/19 12:49 AM, Chris Wilson wrote:
> > Quoting Patchwork (2019-10-23 22:20:49)
> >>    * igt@i915_selftest@live_workarounds:
> >>      - {fi-tgl-u}:         [PASS][3] -> [DMESG-FAIL][4]
> >>     [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7165/fi-tgl-u/igt@i915_selftest@live_workarounds.html
> >>     [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14947/fi-tgl-u/igt@i915_selftest@live_workarounds.html
> > 
> > That does seem to be genuine and worth following up with.
> > -Chris
> > 
> 
> Yes, I've reproduced this locally. Any ideas appreciated here ..

There are two things the test can take care of, stripping the high bit
and replicating the fuzzing across the entire range. Stripping the high
bit is /likely/ enough to circumvent the issue (depending on root cause
of the issue). But the GPU is not meant to hang on bogus LRI; the HW
validator is meant to no-op them.
-Chris
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