On Tue, 22 Oct 2019, Manasi Navare <manasi.d.navare@xxxxxxxxx> wrote:
> On Tue, Oct 22, 2019 at 04:34:14PM +0300, Jani Nikula wrote:
>> DSC isn't DP specific, so remove the dp_ prefix from the crtc state
>> member name. Also moving the member under the dsc sub-struct gives us
>> enough context to allow shortening the name to just config. No
>> functional changes.
>>
>> Cc: Manasi Navare <manasi.d.navare@xxxxxxxxx>
>> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
>
> Sounds good to me and I guess works better with expanding this code
> to other connectors
>
> Reviewed-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
Thanks for the review, pushed both.
BR,
Jani.
>
> Manasi
>
>> ---
>> drivers/gpu/drm/i915/display/intel_display_types.h | 2 +-
>> drivers/gpu/drm/i915/display/intel_vdsc.c | 6 +++---
>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>> index db66f9d623f8..bac40482a2aa 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> @@ -986,8 +986,8 @@ struct intel_crtc_state {
>> bool dsc_split;
>> u16 compressed_bpp;
>> u8 slice_count;
>> + struct drm_dsc_config config;
>> } dsc;
>> - struct drm_dsc_config dp_dsc_cfg;
>>
>> /* Forward Error correction State */
>> bool fec_enable;
>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> index f41a9336476b..896b0c334f5e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> @@ -322,7 +322,7 @@ static int get_column_index_for_rc_params(u8 bits_per_component)
>> int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
>> struct intel_crtc_state *pipe_config)
>> {
>> - struct drm_dsc_config *vdsc_cfg = &pipe_config->dp_dsc_cfg;
>> + struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
>> u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
>> u8 i = 0;
>> int row_index = 0;
>> @@ -485,7 +485,7 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
>> {
>> struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
>> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> - const struct drm_dsc_config *vdsc_cfg = &crtc_state->dp_dsc_cfg;
>> + const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
>> enum pipe pipe = crtc->pipe;
>> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>> u32 pps_val = 0;
>> @@ -885,7 +885,7 @@ static void intel_dp_write_dsc_pps_sdp(struct intel_encoder *encoder,
>> {
>> struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
>> struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
>> - const struct drm_dsc_config *vdsc_cfg = &crtc_state->dp_dsc_cfg;
>> + const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
>> struct drm_dsc_pps_infoframe dp_dsc_pps_sdp;
>>
>> /* Prepare DP SDP PPS header as per DP 1.4 spec, Table 2-123 */
>> --
>> 2.20.1
>>
--
Jani Nikula, Intel Open Source Graphics Center
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