== Series Details == Series: Add scaling filters in DRM layer URL : https://patchwork.freedesktop.org/series/68378/ State : warning == Summary == $ dim checkpatch origin/drm-tip bd6ebd85fce2 drm: Introduce scaling filter mode property 13901f40e66e drm/i915: Add support for scaling filters -:90: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #90: FILE: drivers/gpu/drm/i915/display/intel_display.c:15496: +static void icl_create_scaler_filter_property(struct intel_crtc *crtc, + struct intel_crtc_state *crtc_state) total: 0 errors, 0 warnings, 1 checks, 102 lines checked 5fced141d9e4 drm/i915: Handle nearest-neighbor scaling filter -:141: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #141: FILE: drivers/gpu/drm/i915/display/intel_display.c:5723: + if (state->scaling_filter == DRM_SCALING_FILTER_NN_IS_ONLY && + !scaler_state->integer_scaling) { -:217: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'id' - possible side-effects? #217: FILE: drivers/gpu/drm/i915/i915_reg.h:7249: +#define SKL_PS_COEF_DATA_SET0(pipe, id) _MMIO_PIPE(pipe, \ + _ID(id, _PS_COEF_SET0_DATA_1A, _PS_COEF_SET0_DATA_2A), \ + _ID(id, _PS_COEF_SET0_DATA_1B, _PS_COEF_SET0_DATA_1B)) -:220: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'id' - possible side-effects? #220: FILE: drivers/gpu/drm/i915/i915_reg.h:7252: +#define SKL_PS_COEF_DATA_SET1(pipe, id) _MMIO_PIPE(pipe, \ + _ID(id, _PS_COEF_SET1_DATA_1A, _PS_COEF_SET1_DATA_2A), \ + _ID(id, _PS_COEF_SET1_DATA_1B, _PS_COEF_SET1_DATA_1B)) -:223: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'id' - possible side-effects? #223: FILE: drivers/gpu/drm/i915/i915_reg.h:7255: +#define SKL_PS_COEF_INDEX_SET0(pipe, id) _MMIO_PIPE(pipe, \ + _ID(id, _PS_COEF_SET0_INDEX_1A, _PS_COEF_SET0_INDEX_2A), \ + _ID(id, _PS_COEF_SET0_INDEX_1B, _PS_COEF_SET0_INDEX_1B)) -:226: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'id' - possible side-effects? #226: FILE: drivers/gpu/drm/i915/i915_reg.h:7258: +#define SKL_PS_COEF_INDEX_SET1(pipe, id) _MMIO_PIPE(pipe, \ + _ID(id, _PS_COEF_SET1_INDEX_1A, _PS_COEF_SET1_INDEX_2A), \ + _ID(id, _PS_COEF_SET1_INDEX_1B, _PS_COEF_SET1_INDEX_1B)) total: 0 errors, 0 warnings, 5 checks, 184 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx