Re: [PATCH v2] drm/i915: Make for_each_engine_masked work on intel_gt

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Now you're making me looks silly and reply to myself. :))

On 17/10/2019 10:57, Chris Wilson wrote:

From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>

Medium term goal is to eliminate the i915->engine[] array and to get there
we have recently introduced equivalent array in intel_gt. Now we need to
migrate the code further towards this state.

This next step is to eliminate usage of i915->engines[] from the
for_each_engine_masked iterator.

For this to work we also need to use engine->id as index when populating
the gt->engine[] array and adjust the default engine set indexing to use
engine->legacy_idx instead of assuming gt->engines[] indexing.

v2:
   * Populate gt->engine[] earlier.
   * Check that we don't duplicate engine->legacy_idx

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
---
  drivers/gpu/drm/i915/gem/i915_gem_context.c  | 13 ++++++++++---
  drivers/gpu/drm/i915/gt/intel_engine_cs.c    |  4 ++++
  drivers/gpu/drm/i915/gt/intel_engine_types.h |  1 +
  drivers/gpu/drm/i915/gt/intel_engine_user.c  | 14 +++-----------
  drivers/gpu/drm/i915/gt/intel_gt.c           |  2 +-
  drivers/gpu/drm/i915/gt/intel_hangcheck.c    |  2 +-
  drivers/gpu/drm/i915/gt/intel_reset.c        | 12 ++++++------
  drivers/gpu/drm/i915/gvt/execlist.c          |  4 ++--
  drivers/gpu/drm/i915/gvt/scheduler.c         |  2 +-
  drivers/gpu/drm/i915/i915_active.c           |  4 ++--
  drivers/gpu/drm/i915/i915_drv.h              |  6 +++---
  11 files changed, 34 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 5d8221c7ba83..5e1d89a5721b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -203,15 +203,22 @@ static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx)
  	for_each_engine(engine, gt, id) {
  		struct intel_context *ce;
+ if (engine->legacy_idx == INVALID_ENGINE) 
+			continue;
+
+		GEM_BUG_ON(engine->legacy_idx > I915_NUM_ENGINES);


>= ?


+		GEM_BUG_ON(e->engines[engine->legacy_idx]);
+
  		ce = intel_context_create(ctx, engine);
  		if (IS_ERR(ce)) {
-			__free_engines(e, id);
+			__free_engines(e, e->num_engines + 1);
  			return ERR_CAST(ce);
  		}
- e->engines[id] = ce; 
-		e->num_engines = id + 1;
+		e->engines[engine->legacy_idx] = ce;
+		e->num_engines = max(e->num_engines, engine->legacy_idx);
  	}
+	e->num_engines++;
return e; 
  }
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 5051a1fd2565..4dcdb909b62d 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -277,6 +277,9 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
  	BUILD_BUG_ON(MAX_ENGINE_CLASS >= BIT(GEN11_ENGINE_CLASS_WIDTH));
  	BUILD_BUG_ON(MAX_ENGINE_INSTANCE >= BIT(GEN11_ENGINE_INSTANCE_WIDTH));
+ if (GEM_DEBUG_WARN_ON(id >= ARRAY_SIZE(gt->engine))) 
+		return -EINVAL;
+
  	if (GEM_DEBUG_WARN_ON(info->class > MAX_ENGINE_CLASS))
  		return -EINVAL;
@@ -328,6 +331,7 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id) 
  	intel_engine_sanitize_mmio(engine);
gt->engine_class[info->class][info->instance] = engine; 
+	gt->engine[id] = engine;
intel_engine_add_user(engine); 
  	gt->i915->engine[id] = engine;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 6199064f332b..3451be034caf 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -148,6 +148,7 @@ enum intel_engine_id {
  	VECS1,
  #define _VECS(n) (VECS0 + (n))
  	I915_NUM_ENGINES
+#define INVALID_ENGINE ((enum intel_engine_id)-1)
  };
struct st_preempt_hang { 
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 77cd5de83930..1e28bfeab519 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -171,23 +171,15 @@ static int legacy_ring_idx(const struct legacy_ring *ring)
  static void add_legacy_ring(struct legacy_ring *ring,
  			    struct intel_engine_cs *engine)
  {
-	int idx;
-
  	if (engine->gt != ring->gt || engine->class != ring->class) {
  		ring->gt = engine->gt;
  		ring->class = engine->class;
  		ring->instance = 0;
  	}
- idx = legacy_ring_idx(ring); 
-	if (unlikely(idx == -1))
-		return;
-
-	GEM_BUG_ON(idx >= ARRAY_SIZE(ring->gt->engine));
-	ring->gt->engine[idx] = engine;
-	ring->instance++;
-
-	engine->legacy_idx = idx;
+	engine->legacy_idx = legacy_ring_idx(ring);
+	if (engine->legacy_idx != INVALID_ENGINE)


Bonus points if legacy_ring_idx actually used the new INVALID_ENGINE define.


+		ring->instance++;
  }
void intel_engines_driver_register(struct drm_i915_private *i915) 
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index b3619a2a5d0e..c99b6b2f38c2 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -186,7 +186,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
  		struct intel_engine_cs *engine;
  		enum intel_engine_id id;
- for_each_engine_masked(engine, i915, engine_mask, id) 
+		for_each_engine_masked(engine, gt, engine_mask, id)
  			gen8_clear_engine_error_register(engine);
  	}
  }
diff --git a/drivers/gpu/drm/i915/gt/intel_hangcheck.c b/drivers/gpu/drm/i915/gt/intel_hangcheck.c
index c14dbeb3ccc3..b2af73984f93 100644
--- a/drivers/gpu/drm/i915/gt/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/intel_hangcheck.c
@@ -237,7 +237,7 @@ static void hangcheck_declare_hang(struct intel_gt *gt,
  		hung &= ~stuck;
  	len = scnprintf(msg, sizeof(msg),
  			"%s on ", stuck == hung ? "no progress" : "hang");
-	for_each_engine_masked(engine, gt->i915, hung, tmp)
+	for_each_engine_masked(engine, gt, hung, tmp)
  		len += scnprintf(msg + len, sizeof(msg) - len,
  				 "%s, ", engine->name);
  	msg[len-2] = '\0';
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 477bfafdb103..b191b0745703 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -298,7 +298,7 @@ static int gen6_reset_engines(struct intel_gt *gt,
  		intel_engine_mask_t tmp;
hw_mask = 0; 
-		for_each_engine_masked(engine, gt->i915, engine_mask, tmp) {
+		for_each_engine_masked(engine, gt, engine_mask, tmp) {
  			GEM_BUG_ON(engine->id >= ARRAY_SIZE(hw_engine_mask));
  			hw_mask |= hw_engine_mask[engine->id];
  		}
@@ -432,7 +432,7 @@ static int gen11_reset_engines(struct intel_gt *gt,
  		hw_mask = GEN11_GRDOM_FULL;
  	} else {
  		hw_mask = 0;
-		for_each_engine_masked(engine, gt->i915, engine_mask, tmp) {
+		for_each_engine_masked(engine, gt, engine_mask, tmp) {
  			GEM_BUG_ON(engine->id >= ARRAY_SIZE(hw_engine_mask));
  			hw_mask |= hw_engine_mask[engine->id];
  			ret = gen11_lock_sfc(engine, &hw_mask);
@@ -451,7 +451,7 @@ static int gen11_reset_engines(struct intel_gt *gt,
  	 * expiration).
  	 */
  	if (engine_mask != ALL_ENGINES)
-		for_each_engine_masked(engine, gt->i915, engine_mask, tmp)
+		for_each_engine_masked(engine, gt, engine_mask, tmp)
  			gen11_unlock_sfc(engine);
return ret; 
@@ -510,7 +510,7 @@ static int gen8_reset_engines(struct intel_gt *gt,
  	intel_engine_mask_t tmp;
  	int ret;
- for_each_engine_masked(engine, gt->i915, engine_mask, tmp) { 
+	for_each_engine_masked(engine, gt, engine_mask, tmp) {
  		ret = gen8_engine_reset_prepare(engine);
  		if (ret && !reset_non_ready)
  			goto skip_reset;
@@ -536,7 +536,7 @@ static int gen8_reset_engines(struct intel_gt *gt,
  		ret = gen6_reset_engines(gt, engine_mask, retry);
skip_reset: 
-	for_each_engine_masked(engine, gt->i915, engine_mask, tmp)
+	for_each_engine_masked(engine, gt, engine_mask, tmp)
  		gen8_engine_reset_cancel(engine);
return ret; 
@@ -1206,7 +1206,7 @@ void intel_gt_handle_error(struct intel_gt *gt,
  	 * single reset fails.
  	 */
  	if (intel_has_reset_engine(gt) && !intel_gt_is_wedged(gt)) {
-		for_each_engine_masked(engine, gt->i915, engine_mask, tmp) {
+		for_each_engine_masked(engine, gt, engine_mask, tmp) {
  			BUILD_BUG_ON(I915_RESET_MODESET >= I915_RESET_ENGINE);
  			if (test_and_set_bit(I915_RESET_ENGINE + engine->id,
  					     &gt->reset.flags))
diff --git a/drivers/gpu/drm/i915/gvt/execlist.c b/drivers/gpu/drm/i915/gvt/execlist.c
index f21b8fb5b37e..d6e7a1189bad 100644
--- a/drivers/gpu/drm/i915/gvt/execlist.c
+++ b/drivers/gpu/drm/i915/gvt/execlist.c
@@ -534,7 +534,7 @@ static void clean_execlist(struct intel_vgpu *vgpu,
  	struct intel_vgpu_submission *s = &vgpu->submission;
  	intel_engine_mask_t tmp;
- for_each_engine_masked(engine, dev_priv, engine_mask, tmp) { 
+	for_each_engine_masked(engine, &dev_priv->gt, engine_mask, tmp) {
  		kfree(s->ring_scan_buffer[engine->id]);
  		s->ring_scan_buffer[engine->id] = NULL;
  		s->ring_scan_buffer_size[engine->id] = 0;
@@ -548,7 +548,7 @@ static void reset_execlist(struct intel_vgpu *vgpu,
  	struct intel_engine_cs *engine;
  	intel_engine_mask_t tmp;
- for_each_engine_masked(engine, dev_priv, engine_mask, tmp) 
+	for_each_engine_masked(engine, &dev_priv->gt, engine_mask, tmp)
  		init_vgpu_execlist(vgpu, engine->id);
  }
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c 
index 6850f1f40241..9ebb2534558b 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.c
+++ b/drivers/gpu/drm/i915/gvt/scheduler.c
@@ -887,7 +887,7 @@ void intel_vgpu_clean_workloads(struct intel_vgpu *vgpu,
  	intel_engine_mask_t tmp;
/* free the unsubmited workloads in the queues. */ 
-	for_each_engine_masked(engine, dev_priv, engine_mask, tmp) {
+	for_each_engine_masked(engine, &dev_priv->gt, engine_mask, tmp) {
  		list_for_each_entry_safe(pos, n,
  			&s->workload_q_head[engine->id], list) {
  			list_del_init(&pos->list);
diff --git a/drivers/gpu/drm/i915/i915_active.c b/drivers/gpu/drm/i915/i915_active.c
index aa37c07004b9..7927b1a0c7a6 100644
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -590,8 +590,8 @@ static struct active_node *reuse_idle_barrier(struct i915_active *ref, u64 idx)
  int i915_active_acquire_preallocate_barrier(struct i915_active *ref,
  					    struct intel_engine_cs *engine)
  {
-	struct drm_i915_private *i915 = engine->i915;
  	intel_engine_mask_t tmp, mask = engine->mask;
+	struct intel_gt *gt = engine->gt;
  	struct llist_node *pos, *next;
  	int err;
@@ -603,7 +603,7 @@ int i915_active_acquire_preallocate_barrier(struct i915_active *ref, 
  	 * We can then use the preallocated nodes in
  	 * i915_active_acquire_barrier()
  	 */
-	for_each_engine_masked(engine, i915, mask, tmp) {
+	for_each_engine_masked(engine, gt, mask, tmp) {
  		u64 idx = engine->kernel_context->timeline->fence_context;
  		struct active_node *node;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h 
index 88956f37d96c..40e923b0c2c8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1415,10 +1415,10 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
  		for_each_if ((engine__) = (dev_priv__)->engine[(id__)])
/* Iterator over subset of engines selected by mask */ 
-#define for_each_engine_masked(engine__, dev_priv__, mask__, tmp__) \
-	for ((tmp__) = (mask__) & INTEL_INFO(dev_priv__)->engine_mask; \
+#define for_each_engine_masked(engine__, gt__, mask__, tmp__) \
+	for ((tmp__) = (mask__) & INTEL_INFO((gt__)->i915)->engine_mask; \
  	     (tmp__) ? \
-	     ((engine__) = (dev_priv__)->engine[__mask_next_bit(tmp__)]), 1 : \
+	     ((engine__) = (gt__)->engine[__mask_next_bit(tmp__)]), 1 : \
  	     0;)
#define rb_to_uabi_engine(rb) \ 



Regards,

Tvrtko

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