[PATCH 2/3] drm/i915: Store engine mask in intel_gt

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From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>

Medium term goal is to eliminate the i915->engine[] array and to get there
we have recently introduced equivalent array in intel_gt. Now we need to
migrate the code further towards this state.

To allow for_each_engine_masked call sites to pass in gt instead of i915
we need to have a copy of INTEL_INFO()->engine_mask in intel_gt.

For this to work we also need to use engine->id as index when populating
the gt->engine[] array.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
---
 drivers/gpu/drm/i915/gt/intel_engine_user.c | 4 ++--
 drivers/gpu/drm/i915/gt/intel_gt.c          | 5 +++++
 drivers/gpu/drm/i915/gt/intel_gt.h          | 1 +
 drivers/gpu/drm/i915/gt/intel_gt_types.h    | 4 ++++
 drivers/gpu/drm/i915/i915_drv.c             | 2 ++
 5 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 77cd5de83930..099abae860ec 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -183,8 +183,8 @@ static void add_legacy_ring(struct legacy_ring *ring,
 	if (unlikely(idx == -1))
 		return;
 
-	GEM_BUG_ON(idx >= ARRAY_SIZE(ring->gt->engine));
-	ring->gt->engine[idx] = engine;
+	GEM_BUG_ON(engine->id >= ARRAY_SIZE(ring->gt->engine));
+	ring->gt->engine[engine->id] = engine;
 	ring->instance++;
 
 	engine->legacy_idx = idx;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index b3619a2a5d0e..7a3a9925359b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -37,6 +37,11 @@ void intel_gt_init_hw_early(struct drm_i915_private *i915)
 	intel_gt_pm_disable(&i915->gt);
 }
 
+void intel_gt_init_mmio(struct intel_gt *gt, struct drm_i915_private *i915)
+{
+	gt->__info.engine_mask = INTEL_INFO(i915)->engine_mask;
+}
+
 static void init_unused_ring(struct intel_gt *gt, u32 base)
 {
 	struct intel_uncore *uncore = gt->uncore;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index e6ab0bff0efb..a141f9208f69 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -29,6 +29,7 @@ static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
 
 void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
 void intel_gt_init_hw_early(struct drm_i915_private *i915);
+void intel_gt_init_mmio(struct intel_gt *gt, struct drm_i915_private *i915);
 int __must_check intel_gt_init_hw(struct intel_gt *gt);
 int intel_gt_init(struct intel_gt *gt);
 void intel_gt_driver_register(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index be4b263621c8..bb813e0a8fa3 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -94,6 +94,10 @@ struct intel_gt {
 
 	u32 pm_guc_events;
 
+	struct {
+		intel_engine_mask_t engine_mask;
+	} __info; /* Hack to enable poly-morphic for_each_engine_masked. */
+
 	struct intel_engine_cs *engine[I915_NUM_ENGINES];
 	struct intel_engine_cs *engine_class[MAX_ENGINE_CLASS + 1]
 					    [MAX_ENGINE_INSTANCE + 1];
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f02a34722217..4d8ee8c54abd 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -592,6 +592,8 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
 
 	intel_device_info_init_mmio(dev_priv);
 
+	intel_gt_init_mmio(&dev_priv->gt, dev_priv);
+
 	intel_uncore_prune_mmio_domains(&dev_priv->uncore);
 
 	intel_uc_init_mmio(&dev_priv->gt.uc);
-- 
2.20.1

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