On Fri, 2019-10-11 at 15:25 +0300, Ville Syrjälä wrote: > On Thu, Oct 10, 2019 at 12:32:38PM -0700, José Roberto de Souza > wrote: > > If all pipes are fused off it means that display is disabled, > > similar > > like we handle for GEN 7 and 8 right above. > > > > On GEN 9 the bit 31 is "Internal Graphics Disable" and on newer > > GENs Here should be bit 30 is "Internal Display Disable". If bit 31 is set I guess not even GT is available but will not handle this here. > > it has another function, probably on GEN 9 when bit 31 is set all > > the 3 pipes disable bit are set, so we can unify the handling. > > I'm not sure this is really correct. The description says the pipe > will > just output a solid color, so the display hardware may be there to > some > degree and if we don't want to waste power we may have to power > manage > some of it still. > > Not sure how high up we've plugged in the 'pipe_mask==0 -> display > not > there' logic. If it's too high up we may leave some power on the > floor. > > But all that is just speculation on my part. Would probably be good > to get some clarification to the spec about this stuff. So would be better set i915_modparams.disable_display = 1, so in future we can power off. > > > Cc: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_device_info.c | 11 +++++------ > > 1 file changed, 5 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_device_info.c > > b/drivers/gpu/drm/i915/intel_device_info.c > > index 85e480bdc673..c01fccfe3cca 100644 > > --- a/drivers/gpu/drm/i915/intel_device_info.c > > +++ b/drivers/gpu/drm/i915/intel_device_info.c > > @@ -972,15 +972,14 @@ void intel_device_info_runtime_init(struct > > drm_i915_private *dev_priv) > > enabled_mask &= ~BIT(PIPE_D); > > > > /* > > - * At least one pipe should be enabled and if there are > > - * disabled pipes, they should be the last ones, with > > no holes > > - * in the mask. > > + * If there are disabled pipes, they should be the last > > ones, > > + * with no holes in the mask. > > */ > > - if (enabled_mask == 0 || !is_power_of_2(enabled_mask + > > 1)) > > + if (enabled_mask && !is_power_of_2(enabled_mask + 1)) > > DRM_ERROR("invalid pipe fuse configuration: > > enabled_mask=0x%x\n", > > enabled_mask); > > - else > > - info->pipe_mask = enabled_mask; > > + > > + info->pipe_mask = enabled_mask; > > } > > > > /* Initialize slice/subslice/EU info */ > > -- > > 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx