From: Paulo Zanoni <paulo.r.zanoni at intel.com>
Hi
Some time ago I sent an RFC containing 30 patches fixing Haswell display. This
is a new version of that series. The main difference is that those patches were
on the pre-modeset-rework world and these are now on the post-modeset-rework
world. I have to say that the modeset-rework work simplified a lot of things and
now I am very happy with the result of my patches.
We are now following 95% of the "mode set sequence" described in our
documentation. What we still need to do is move some things from crtc_mode_set
to intel_ddi_set_pipe_settings (which is called by crtc_enable) and do a small
adjustment in the order we write to DP_TP_CTL when using eDP, but these patches
are not strictly necessary to make things work, so they can wait a little.
I spent a long time testing this series on my machine and it is working very
stable, I don't see any of the hangs I was seeing previously (when I sent the
RFC), so I believe any problems brought by this patch series should be small. I
also ran these patches on a SNB laptop and a quick check shows me it still
works, including DP and HDMI. The only real problem I am aware of is that DP
does not work on some specific HSW machines with some specific BIOS versions,
but even eDP works. I still don't have access to those machines, but when I do I
will send the fixes.
This patch series contains 4 sub-series:
- Patches 1-10 contain fixes for the pipe mode-set sequence (which is the same
on all encoders), a complete rewrite of how we handle our clocks and an
HDMI-specific patch. The patches are organized in that specific order
because I tried to not introduce any regression in the middle of the series.
- Patches 11-24 add DP support. This is a long series of very small and boring
patches. Some people may think there are too many patches and we should
group some patches into bigger ones, I won't disagree. I wrote many tiny
patches because IMHO this makes it easier to rebase and change things (and
also review).
Notice that after patch 24 you will still not have your DP outputs working.
If you replace one of the "intel_hdmi_init" cals inside intel_ddi_init with
"intel_dp_init" you will get your DP output working, but you will break
HDMI. Making both DP and HDMI working on the same port is not simple and
only works after patch 47.
- Patches 25-38 make eDP work. Again, another slow series and maybe we could
merge some of the small patches into bigger ones. After patch 38 eDP will
actually start working (even though DP does not work yet).
- Patches 39-47 add the magic to make both HDMI and DP outputs work on the
same port. Just calling "intel_hdmi_init" and "intel_dp_init" on the same
port won't work as the encoders use basically the same registers. These
patches create a DDI encoder that has 2 connectors: a DP and an HDMI. To do
this we had to change some code that runs on all gens, but I think it was
worth the change.
And a last small detail: I implemented this series on top of
drm-intel-next-queued + patch "drm/i915: extract intel_set_pipe_timings from
crtc_mode_set".
Opinions?
Paulo Zanoni (47):
drm/i915: rewrite the LCPLL code
drm/i915: enable and disable DDI_FUNC_CTL at the right time
drm/i915: enable and disable PIPE_CLK_SEL at the right time
drm/i915: completely rewrite the Haswell PLL handling code
drm/i915: don't rely on previous values set on DDI_BUF_CTL
drm/i915: disable DDI_BUF_CTL at the correct time
drm/i915: add haswell_crtc_mode_set
drm/i915: add proper CPU/PCH checks to crtc_mode_set functions
drm/i915: add haswell_set_pipeconf
drm/i915: pipe and planes should be disabled on haswell_crtc_mode_set
drm/i915: add DP support to intel_ddi_enable_pipe_func
drm/i915: add intel_ddi_set_pipe_settings
drm/i915: add DP support to intel_ddi_pll_mode_set
drm/i915: add DP support to intel_ddi_disable_port
drm/i915: add DP support to intel_ddi_mode_set
drm/i915: add basic Haswell DP link train bits
drm/i915: use TU_SIZE macro at intel_dp_set_m_n
drm/i915: fix Haswell DP M/N registers
drm/i915: fix DP AUX register definitions on Haswell
drm/i915: add DP support to intel_ddi_get_encoder_port
drm/i915: add DP support to intel_ddi_get_hw_state
drm/i915: add DP support to intel_enable_ddi
drm/i915: implement Haswell DP link train sequence
drm/i915: set the correct function pointers for Haswell DP
drm/i915: add TRANSCODER_EDP
drm/i915: convert PIPE_CLK_SEL to transcoder
drm/i915: convert DDI_FUNC_CTL to transcoder
drm/i915: check TRANSCODER_EDP on intel_modeset_setup_hw_state
drm/i915: convert PIPECONF to use transcoder instead of pipe
drm/i915: convert PIPE_MSA_MISC to transcoder
drm/i915: convert CPU M/N timings to transcoder
drm/i915: convert pipe timing definitions to transcoder
drm/i915: implement workaround for VTOTAL when using TRANSCODER_EDP
drm/i915: select the correct pipe when using TRANSCODER_EDP
drm/i915: set the correct eDP aux channel clock divider on DDI
drm/i915: set/unset the DDI eDP backlight
drm/i915: turn the eDP DDI panel on/off
drm/i915: enable DDI eDP
drm/i915: simplify assignments inside intel_dp.c
drm/i915: add intel_dp_to_dev and intel_hdmi_to_dev
drm/i915: create intel_digital_port and use it
drm/i915: remove encoder args from intel_{dp,hdmi}_add_properties
drm/i915: split intel_hdmi_init into encoder and connector pieces
drm/i915: split intel_dp_init into encoder and connector pieces
drm/i915: reset intel_encoder->type when DP or HDMI is detected
drm/i915: add intel_ddi_connector_get_hw_state
drm/i915: create the DDI encoder
drivers/gpu/drm/i915/i915_drv.h | 15 +
drivers/gpu/drm/i915/i915_irq.c | 11 +-
drivers/gpu/drm/i915/i915_reg.h | 139 +++--
drivers/gpu/drm/i915/intel_crt.c | 12 +-
drivers/gpu/drm/i915/intel_ddi.c | 935 ++++++++++++++++++++++++++++------
drivers/gpu/drm/i915/intel_display.c | 452 +++++++++++++---
drivers/gpu/drm/i915/intel_dp.c | 470 +++++++++++------
drivers/gpu/drm/i915/intel_drv.h | 82 ++-
drivers/gpu/drm/i915/intel_hdmi.c | 135 ++---
drivers/gpu/drm/i915/intel_sprite.c | 3 +-
drivers/gpu/drm/i915/intel_tv.c | 4 +-
11 files changed, 1770 insertions(+), 488 deletions(-)
--
1.7.10.4
