Hey, On Wed, 2 Oct 2019, Imre Deak wrote: > On Tue, Oct 01, 2019 at 07:35:54PM +0300, Kai Vehmanen wrote: > > On gen10/11 platforms, driver must set the enable bit of AUD_PIN_BUF_CTL > > as part of audio power up sequence. > > Good catch, seems to match bspec 21352 (and 49280 for GEN12+). > > Before setting this bit the sequence has an other step done in the HDA > driver (LCTL reg write in sound/pci/hda/hda_intel.c, intel_init_lctl()) > before setting this bit. If that order is important we'd need another > hook in drm_audio_component_ops (and also clear the bit). that is true. The full sequences to avoid unsolicited responses are quite awkward as there are multiple (new) hops between display and hda drivers. I don't think we strictly need these on Linux, but it's definitely a problem if we don't ensure AUD_PIN_BUF_CTL is set. I have one failing case left on ICL where v1 patchset does not seem sufficient. The test case involves a loop of doing S3 suspend, resume, unload driver, load driver, play audio via HDMI and repeat. I get systematically better results with this patch, but it still fails before 100 iterations. It's a definite improvement, so probably this patch should go in in any case. I have a wip patch to HDA driver side that seems to cure the remaining issue as well. The problem seems slightly different -- we miss an IRQ but the display-pch transactions are functional, so this can be a different problem. I'll continue testing a bit and once confident enough, send out the v2 patch. Br, Kai _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
