Re: [PATCH 10/22] drm/i915/selftests: add write-dword test for LMEM

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Quoting Matthew Auld (2019-09-27 18:33:57)
> +       i = 0;
> +       engines = i915_gem_context_lock_engines(ctx);
> +       do {
> +               u32 rng = prandom_u32_state(&prng);
> +               u32 dword = offset_in_page(rng) / 4;
> +
> +               ce = engines->engines[order[i] % engines->num_engines];
> +               i = (i + 1) % (count * count);
> +               if (!ce || !intel_engine_can_store_dword(ce->engine))
> +                       continue;
> +
> +               err = igt_gpu_write_dw(ce, vma, dword, rng);
> +               if (err)
> +                       break;

Do you have a test that does
	dword,
	64B or cacheline,
	page
	random width&strides of the above
before doing the read back of a random dword from those?

Think nasty cache artifacts, PCI transfers, and timing.
-Chris
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