== Series Details == Series: DC3CO Support for TGL (rev11) URL : https://patchwork.freedesktop.org/series/64923/ State : warning == Summary == $ dim checkpatch origin/drm-tip 805a6f5f1e23 drm/i915/tgl: Add DC3CO required register and bits 5e43f1ddfa09 drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask b94f1a7b1d4a drm/i915/tgl: Enable DC3CO state in "DC Off" power well -:26: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #26: v9: Used switch case for target DC state in gen9_dc_off_power_well_disable(). -:72: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.rst #72: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:817: + udelay(200); total: 0 errors, 1 warnings, 1 checks, 199 lines checked c413c301cf16 drm/i915/tgl: Do modeset to enable and configure DC3CO exitline 525848d6a4b1 drm/i915/tgl: DC3CO PSR2 helper fc92420beb0e drm/i915/tgl: switch between dc3co and dc5 based on display idleness 5823e8625389 drm/i915/tgl: Add DC3CO counter in i915_dmc_info _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
