drm_debug_enabled() is the way to check. __drm_debug is now reserved for drm print code only. No functional changes. v2: Rebase on move unlikely() to drm_debug_enabled() Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> --- drivers/gpu/drm/drm_print.c | 8 ++++---- include/drm/drm_print.h | 5 +++-- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c index a7c89ec5ff26..ca3c56b026f0 100644 --- a/drivers/gpu/drm/drm_print.c +++ b/drivers/gpu/drm/drm_print.c @@ -37,11 +37,11 @@ #include <drm/drm_print.h> /* - * drm_debug: Enable debug output. + * __drm_debug: Enable debug output. * Bitmask of DRM_UT_x. See include/drm/drm_print.h for details. */ -unsigned int drm_debug; -EXPORT_SYMBOL(drm_debug); +unsigned int __drm_debug; +EXPORT_SYMBOL(__drm_debug); MODULE_PARM_DESC(debug, "Enable debug output, where each bit enables a debug category.\n" "\t\tBit 0 (0x01) will enable CORE messages (drm core code)\n" @@ -52,7 +52,7 @@ MODULE_PARM_DESC(debug, "Enable debug output, where each bit enables a debug cat "\t\tBit 5 (0x20) will enable VBL messages (vblank code)\n" "\t\tBit 7 (0x80) will enable LEASE messages (leasing code)\n" "\t\tBit 8 (0x100) will enable DP messages (displayport code)"); -module_param_named(debug, drm_debug, int, 0600); +module_param_named(debug, __drm_debug, int, 0600); void __drm_puts_coredump(struct drm_printer *p, const char *str) { diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h index 4618e90cd124..cde54900d593 100644 --- a/include/drm/drm_print.h +++ b/include/drm/drm_print.h @@ -34,7 +34,8 @@ #include <drm/drm.h> -extern unsigned int drm_debug; +/* Do *not* use outside of drm_print.[ch]! */ +extern unsigned int __drm_debug; /** * DOC: print @@ -296,7 +297,7 @@ static inline struct drm_printer drm_err_printer(const char *prefix) static inline bool drm_debug_enabled(unsigned int category) { - return unlikely(drm_debug & category); + return unlikely(__drm_debug & category); } __printf(3, 4) -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx