On Fri, Sep 20, 2019 at 1:54 PM Lucas De Marchi
<lucas.de.marchi@xxxxxxxxx> wrote:
>
> On Wed, Sep 18, 2019 at 5:07 PM José Roberto de Souza
> <jose.souza@xxxxxxxxx> wrote:
> >
> > From: Clinton A Taylor <clinton.a.taylor@xxxxxxxxx>
> >
> > Add a helper function to return pin map for use during dkl phy
> > DP_MODE settings, PORT_TX_DFLEXPA1 exist on ICL but we don't need it.
> >
> > The user of this function will come in future TC patches.
> >
> > Signed-off-by: Clinton A Taylor <clinton.a.taylor@xxxxxxxxx>
> > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/display/intel_tc.c | 15 +++++++++++++++
> > drivers/gpu/drm/i915/display/intel_tc.h | 1 +
> > drivers/gpu/drm/i915/i915_reg.h | 5 +++++
> > 3 files changed, 21 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > index 20fbb084830e..5d9577588e91 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > @@ -70,6 +70,21 @@ u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
> > DP_LANE_ASSIGNMENT_SHIFT(dig_port->tc_phy_fia_idx);
> > }
> >
> > +u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port)
> > +{
> > + struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > + struct intel_uncore *uncore = &i915->uncore;
> > + u32 pin_mask;
> > +
> > + pin_mask = intel_uncore_read(uncore,
> > + PORT_TX_DFLEXPA1(dig_port->tc_phy_fia));
> > +
> > + WARN_ON(pin_mask == 0xffffffff);
> > +
> > + return (pin_mask & DP_PIN_ASSIGNMENT_MASK(dig_port->tc_phy_fia_idx)) >>
> > + DP_PIN_ASSIGNMENT_SHIFT(dig_port->tc_phy_fia_idx);
>
> AFAICS this is tc_port-based, not tc_phy_fia_idx. tc_phy_fia_idx
> should only ever be used
> together with the HIP_INDEX.
humn... scratch that. That spec is for non-modular FIA. If it's
correct that it applies for all the FIA registers, then this
implementation is correct,
even if it doesn't match the spec.
Reviewed-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
Lucas De Marchi
>
> Lucas De Marchi
>
> > +}
> > +
> > int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
> > {
> > struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
> > index 944d84c8cce1..1b8638dd340a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.h
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.h
> > @@ -14,6 +14,7 @@ struct drm_i915_private;
> >
> > bool intel_tc_port_connected(struct intel_digital_port *dig_port);
> > u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
> > +u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port);
> > int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port);
> > void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
> > int required_lanes);
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 32f98d0e0e9c..91a79e809dd2 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -11845,4 +11845,9 @@ enum skl_power_gate {
> > #define PORT_TX_DFLEXDPCSSS(fia) _MMIO_FIA((fia), 0x00894)
> > #define DP_PHY_MODE_STATUS_NOT_SAFE(idx) (1 << (idx))
> >
> > +#define PORT_TX_DFLEXPA1(fia) _MMIO_FIA((fia), 0x00880)
> > +#define DP_PIN_ASSIGNMENT_SHIFT(idx) ((idx) * 4)
> > +#define DP_PIN_ASSIGNMENT_MASK(idx) (0xf << ((idx) * 4))
> > +#define DP_PIN_ASSIGNMENT(idx, x) ((x) << ((idx) * 4))
> > +
> > #endif /* _I915_REG_H_ */
> > --
> > 2.23.0
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Lucas De Marchi
--
Lucas De Marchi
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