Similar to plane programming, we need a separate master_plane_state from
which we will read all atomic properties, and plane_state for the real
coordinates.
Although we add all planes with icl_add_linked_planes(),
icl_check_nv12_planes() may add extra Y planes on the slave CRTC.
For those planes, the corresponding planes on the master CRTC
are not added, so we have to be slightly more careful in that case.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 2 +-
.../gpu/drm/i915/display/intel_atomic_plane.h | 4 ++
drivers/gpu/drm/i915/display/intel_display.c | 71 +++++++++++--------
3 files changed, 47 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index a0c1d1696c8c..9fca9e90af58 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -204,7 +204,7 @@ struct intel_crtc *
intel_plane_get_crtc_from_states(struct intel_atomic_state *state,
const struct intel_plane_state *old_plane_state,
const struct intel_plane_state *new_plane_state)
- {
+{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
struct intel_plane *plane = to_intel_plane(new_plane_state->base.plane);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index c98ccf8114c3..d789a1886908 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -52,5 +52,9 @@ int intel_atomic_plane_check_scaling(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *master_plane_state,
struct intel_plane_state *plane_state,
int min_scale, int max_scale);
+struct intel_crtc *
+intel_plane_get_crtc_from_states(struct intel_atomic_state *state,
+ const struct intel_plane_state *old_plane_state,
+ const struct intel_plane_state *new_plane_state);
#endif /* __INTEL_ATOMIC_PLANE_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 690c3d10ce44..8e1fab0fe7b5 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14929,11 +14929,12 @@ static void add_rps_boost_after_vblank(struct drm_crtc *crtc,
add_wait_queue(drm_crtc_vblank_waitqueue(crtc), &wait->wait);
}
-static int intel_plane_pin_fb(struct intel_plane_state *plane_state)
+static int intel_plane_pin_fb(const struct intel_plane_state *master_plane_state,
+ struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- struct drm_framebuffer *fb = plane_state->base.fb;
+ struct drm_framebuffer *fb = master_plane_state->base.fb;
struct i915_vma *vma;
if (plane->id == PLANE_CURSOR &&
@@ -14992,21 +14993,27 @@ static void fb_obj_bump_render_priority(struct drm_i915_gem_object *obj)
* Returns 0 on success, negative error code on failure.
*/
int
-intel_prepare_plane_fb(struct drm_plane *plane,
- struct drm_plane_state *new_state)
+intel_prepare_plane_fb(struct drm_plane *drm_plane,
+ struct drm_plane_state *_new_plane_state)
{
- struct intel_atomic_state *intel_state =
- to_intel_atomic_state(new_state->state);
- struct drm_i915_private *dev_priv = to_i915(plane->dev);
- struct drm_framebuffer *fb = new_state->fb;
- struct drm_i915_gem_object *obj = intel_fb_obj(fb);
- struct drm_i915_gem_object *old_obj = intel_fb_obj(plane->state->fb);
+ struct intel_plane *plane = to_intel_plane(drm_plane);
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_atomic_state *state =
+ to_intel_atomic_state(_new_plane_state->state);
+ struct intel_plane_state *new_plane_state = to_intel_plane_state(_new_plane_state);
+ const struct intel_plane_state *old_plane_state =
+ intel_atomic_get_old_plane_state(state, plane);
+ const struct intel_plane_state *new_master_plane_state = new_plane_state;
+ struct drm_i915_gem_object *obj, *old_obj;
+ struct intel_crtc *crtc;
int ret;
- if (old_obj) {
- struct intel_crtc_state *crtc_state =
- intel_atomic_get_new_crtc_state(intel_state,
- to_intel_crtc(plane->state->crtc));
+ old_obj = intel_fb_obj(old_plane_state->base.fb);
+ if (!old_plane_state->bigjoiner_slave && old_obj) {
+ struct intel_crtc_state *crtc_state;
+
+ crtc = to_intel_crtc(old_plane_state->base.crtc);
+ crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
/* Big Hammer, we also need to ensure that any pending
* MI_WAIT_FOR_EVENT inside a user batch buffer on the
@@ -15020,7 +15027,7 @@ intel_prepare_plane_fb(struct drm_plane *plane,
* can safely continue.
*/
if (needs_modeset(crtc_state)) {
- ret = i915_sw_fence_await_reservation(&intel_state->commit_ready,
+ ret = i915_sw_fence_await_reservation(&state->commit_ready,
old_obj->base.resv, NULL,
false, 0,
GFP_KERNEL);
@@ -15029,19 +15036,18 @@ intel_prepare_plane_fb(struct drm_plane *plane,
}
}
- if (new_state->fence) { /* explicit fencing */
- ret = i915_sw_fence_await_dma_fence(&intel_state->commit_ready,
- new_state->fence,
+ if (new_plane_state->base.fence) { /* explicit fencing */
+ ret = i915_sw_fence_await_dma_fence(&state->commit_ready,
+ new_plane_state->base.fence,
I915_FENCE_TIMEOUT,
GFP_KERNEL);
if (ret < 0)
return ret;
}
- if (to_intel_plane_state(new_state)->planar_slave) {
- struct intel_plane_state *new_plane_state = to_intel_plane_state(new_state);
+ if (new_plane_state->planar_slave) {
const struct intel_plane_state *linked_plane_state =
- intel_atomic_get_new_plane_state(intel_state, new_plane_state->planar_linked_plane);
+ intel_atomic_get_new_plane_state(state, new_plane_state->planar_linked_plane);
/*
* We are a planar slave, VMA is on our planar master,
@@ -15055,6 +15061,12 @@ intel_prepare_plane_fb(struct drm_plane *plane,
return 0;
}
+ if (new_plane_state->bigjoiner_slave)
+ new_master_plane_state = intel_atomic_get_new_plane_state(state, new_plane_state->bigjoiner_plane);
+
+ crtc = intel_plane_get_crtc_from_states(state, old_plane_state,
+ new_plane_state);
+ obj = intel_fb_obj(new_master_plane_state->base.fb);
if (!obj)
return 0;
@@ -15068,7 +15080,7 @@ intel_prepare_plane_fb(struct drm_plane *plane,
return ret;
}
- ret = intel_plane_pin_fb(to_intel_plane_state(new_state));
+ ret = intel_plane_pin_fb(new_master_plane_state, new_plane_state);
mutex_unlock(&dev_priv->drm.struct_mutex);
i915_gem_object_unpin_pages(obj);
@@ -15078,10 +15090,10 @@ intel_prepare_plane_fb(struct drm_plane *plane,
fb_obj_bump_render_priority(obj);
intel_frontbuffer_flush(obj->frontbuffer, ORIGIN_DIRTYFB);
- if (!new_state->fence) { /* implicit fencing */
+ if (!new_plane_state->base.fence) { /* implicit fencing */
struct dma_fence *fence;
- ret = i915_sw_fence_await_reservation(&intel_state->commit_ready,
+ ret = i915_sw_fence_await_reservation(&state->commit_ready,
obj->base.resv, NULL,
false, I915_FENCE_TIMEOUT,
GFP_KERNEL);
@@ -15090,11 +15102,11 @@ intel_prepare_plane_fb(struct drm_plane *plane,
fence = dma_resv_get_excl_rcu(obj->base.resv);
if (fence) {
- add_rps_boost_after_vblank(new_state->crtc, fence);
+ add_rps_boost_after_vblank(&crtc->base, fence);
dma_fence_put(fence);
}
} else {
- add_rps_boost_after_vblank(new_state->crtc, new_state->fence);
+ add_rps_boost_after_vblank(&crtc->base, new_plane_state->base.fence);
}
/*
@@ -15105,9 +15117,9 @@ intel_prepare_plane_fb(struct drm_plane *plane,
* that are not quite steady state without resorting to forcing
* maximum clocks following a vblank miss (see do_rps_boost()).
*/
- if (!intel_state->rps_interactive) {
+ if (!state->rps_interactive) {
intel_rps_mark_interactive(dev_priv, true);
- intel_state->rps_interactive = true;
+ state->rps_interactive = true;
}
return 0;
@@ -15354,7 +15366,8 @@ intel_legacy_cursor_update(struct drm_plane *plane,
if (ret)
goto out_free;
- ret = intel_plane_pin_fb(to_intel_plane_state(new_plane_state));
+ ret = intel_plane_pin_fb(to_intel_plane_state(new_plane_state),
+ to_intel_plane_state(new_plane_state));
if (ret)
goto out_unlock;
--
2.20.1
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