On Wed, Nov 21, 2012 at 10:44:23AM +0000, Chris Wilson wrote: > As the SDVO/HDMI registers are multiplex, it is safe to assume that the > w/a required for HDMI on IbexPoint, namely that the SDVO register cannot > both be disabled and have selected transcoder B, is also required for > SDVO. At least the modeset state checker detects that the transcoder > selection is left in the undefined state, and so it appears sensible to > apply the w/a: > > [ 1814.480052] WARNING: at drivers/gpu/drm/i915/intel_display.c:1487 assert_pch_hdmi_disabled+0xad/0xb5() > [ 1814.480053] Hardware name: Libretto W100 > [ 1814.480054] IBX PCH hdmi port still using transcoder B > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57066 > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk> Queued for -next, thanks for the patch. > --- > drivers/gpu/drm/i915/intel_sdvo.c | 38 ++++++++++++++++++++++++++++++++++++- > 1 file changed, 37 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c > index 92baac2..b302ef4 100644 > --- a/drivers/gpu/drm/i915/intel_sdvo.c > +++ b/drivers/gpu/drm/i915/intel_sdvo.c > @@ -1228,6 +1228,30 @@ static void intel_disable_sdvo(struct intel_encoder *encoder) > > temp = I915_READ(intel_sdvo->sdvo_reg); > if ((temp & SDVO_ENABLE) != 0) { > + /* HW workaround for IBX, we need to move the port to > + * transcoder A before disabling it. */ > + if (HAS_PCH_IBX(encoder->base.dev)) { > + struct drm_crtc *crtc = encoder->base.crtc; > + int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1; All these "is the encoder enabled" and "do we have a crtc for sure" checks remind me that we still have cruft all over the place, which should die with the modeset rework. Work for 3.9 I guess ;-) -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
