On Wed, Sep 11, 2019 at 12:08:00PM +0300, Jani Nikula wrote: > On Tue, 10 Sep 2019, Manasi Navare <manasi.d.navare@xxxxxxxxx> wrote: > > On Tue, Sep 10, 2019 at 11:07:30AM -0700, Manasi Navare wrote: > >> On Tue, Sep 10, 2019 at 12:29:19PM +0300, Jani Nikula wrote: > >> > On Sun, 08 Sep 2019, Manasi Navare <manasi.d.navare@xxxxxxxxx> wrote: > >> > > This patch series addresses all review comments and now the enable and > >> > > disable paths follow the method of obtaining slave states from master > >> > > and updating master-slaves in correct order during master modeset. > >> > > >> > Main high level question: what does it take to enable this on gen9+? > >> > >> As per the Bspec project platforms, the first platform that supports this is > >> ICL > > > > Hi Jani, > > > > Apparently the Bspec caused some confusion, after double checking with the > > HW teams here, this feature is enabled starting BDW for the SST connectors > > and only the MST support is new to Gen 11+. > > > > So i guess I can change the patches to add support starting BDW and > > this should also fix the 5K tiled display issue that Ankit has been > > working on > > Thanks! I don't mind getting the patches merged for ICL+ at first, and > updating to cover older gens in follow-up. So you are suggesting that i keep the patches as is and have them get merged first and then i could change the GEN checks to add support for BDW+? Regards Manasi > > BR, > Jani. > > > > > > Manasi > > > >> > >> Regards > >> Manasi > >> > >> > > >> > BR, > >> > Jani. > >> > > >> > > >> > -- > >> > Jani Nikula, Intel Open Source Graphics Center > >> _______________________________________________ > >> Intel-gfx mailing list > >> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx