Our "whisper" consists of writing the secret value given to us by our predecessors into the next batch, i.e. we are modifying on the GPU the chain of inflight batches. As the preparser on gen12 will read the batch instructions ahead of time, we need to disable it around the self-modifications. Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx> --- tests/i915/gem_exec_whisper.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/tests/i915/gem_exec_whisper.c b/tests/i915/gem_exec_whisper.c index de7a14dad..43b716e7c 100644 --- a/tests/i915/gem_exec_whisper.c +++ b/tests/i915/gem_exec_whisper.c @@ -166,6 +166,11 @@ static void ctx_set_random_priority(int fd, uint32_t ctx) gem_context_set_priority(fd, ctx, prio); } +static uint32_t preparser_disable(bool state) +{ + return 0x5 << 23 | 1 << 8 | state; /* custom MI_ARB_CHECK */ +} + static void whisper(int fd, unsigned engine, unsigned flags) { const uint32_t bbe = MI_BATCH_BUFFER_END; @@ -259,6 +264,8 @@ static void whisper(int fd, unsigned engine, unsigned flags) loc = 8; if (gen >= 4) loc += 4; + if (gen >= 12) + loc += 1; reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION; reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION; @@ -280,6 +287,8 @@ static void whisper(int fd, unsigned engine, unsigned flags) } i = 0; + if (gen >= 12) + batch[i++] = preparser_disable(true); batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0); if (gen >= 8) { batch[++i] = store.offset + loc; @@ -293,6 +302,8 @@ static void whisper(int fd, unsigned engine, unsigned flags) } batch[++i] = 0xc0ffee; igt_assert(loc == sizeof(uint32_t) * i); + if (gen >= 12) + batch[++i] = preparser_disable(false); batch[++i] = MI_BATCH_BUFFER_END; if (flags & CONTEXTS) { -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx