Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > Be paranoid and make sure we flush any and all writes out of the WCB > before performing the UC mmio to update the RING_TAIL. (An UC write > should itself be enough to do the flush, hence the paranoia here.) Quite > infrequently, we see problems where the GPU seems to overshoot the > RING_TAIL and so executes garbage hence the speculation. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=111598 > References: https://bugs.freedesktop.org/show_bug.cgi?id=111417 > References: https://bugs.freedesktop.org/show_bug.cgi?id=111034 > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> It could be even that the cost is ameliorated with the uc write, if the hw is clever enough. Regardless, we gain a datapoint with marginal cost. Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c > index bbda85dcaa42..73c3ffc80218 100644 > --- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c > @@ -930,6 +930,7 @@ static void cancel_requests(struct intel_engine_cs *engine) > static void i9xx_submit_request(struct i915_request *request) > { > i915_request_submit(request); > + wmb(); /* paranoid flush writes out of the WCB before mmio */ > > ENGINE_WRITE(request->engine, RING_TAIL, > intel_ring_set_tail(request->ring, request->tail)); > -- > 2.23.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
