> -----Original Message-----
> From: Manna, Animesh
> Sent: Monday, September 9, 2019 10:27 PM
> To: Sharma, Shashank <shashank.sharma@xxxxxxxxx>; intel-
> gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Thierry, Michel <michel.thierry@xxxxxxxxx>; Nikula, Jani <jani.nikula@xxxxxxxxx>;
> Vivi, Rodrigo <rodrigo.vivi@xxxxxxxxx>
> Subject: Re: [PATCH v5 05/11] drm/i915/dsb: Check DSB engine status.
>
>
>
> On 9/9/2019 6:43 PM, Sharma, Shashank wrote:
> >
> > On 9/7/2019 4:37 PM, Animesh Manna wrote:
> >> As per bspec check for DSB status before programming any of its
> >> register. Inline function added to check the dsb status.
> >>
> >> Cc: Michel Thierry <michel.thierry@xxxxxxxxx>
> >> Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
> >> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> >> Cc: Shashank Sharma <shashank.sharma@xxxxxxxxx>
> >> Signed-off-by: Animesh Manna <animesh.manna@xxxxxxxxx>
> >> ---
> >> drivers/gpu/drm/i915/display/intel_dsb.c | 9 +++++++++
> >> drivers/gpu/drm/i915/i915_reg.h | 7 +++++++
> >> 2 files changed, 16 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> >> b/drivers/gpu/drm/i915/display/intel_dsb.c
> >> index 0f55ed683d41..2c8415518c65 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> >> @@ -17,6 +17,15 @@
> >> #define DSB_BYTE_EN_SHIFT 20
> >> #define DSB_REG_VALUE_MASK 0xfffff
> >> +static inline bool is_dsb_busy(struct intel_dsb *dsb)
> >> +{
> >> + struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);
> >> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> >> + enum pipe pipe = crtc->pipe;
> >> +
> >> + return DSB_STATUS & I915_READ(DSB_CTRL(pipe, dsb->id)); }
> >> +
> >> struct intel_dsb *
> >> intel_dsb_get(struct intel_crtc *crtc)
> >> {
> >> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> >> b/drivers/gpu/drm/i915/i915_reg.h index 006cffd56be2..a3099f712ae6
> >> 100644
> >> --- a/drivers/gpu/drm/i915/i915_reg.h
> >> +++ b/drivers/gpu/drm/i915/i915_reg.h
> >> @@ -11676,4 +11676,11 @@ enum skl_power_gate {
> >> #define PORT_TX_DFLEXDPCSSS(fia) _MMIO_FIA((fia), 0x00894)
> >> #define DP_PHY_MODE_STATUS_NOT_SAFE(tc_port) (1 << (tc_port))
> >> +/* This register controls the Display State Buffer (DSB) engines.
> >> */
> >> +#define _DSBSL_INSTANCE_BASE 0x70B00
> >> +#define DSBSL_INSTANCE(pipe, id) (_DSBSL_INSTANCE_BASE + \
> >> + (pipe) * 0x1000 + (id) * 100)
> >
> > Why is pipe in () ?
>
> mmio offset per DSB depend on pipe and dsb-id (3 DSB per pipe.) offset of PIPE_A
> DSB1-> 70B00 offset of PIPE_B DSB1-> 71B00 and so on...
>
The question here is why is the 'pipe' in braces ? why is it '(pipe)', instead of 'pipe'. I don’t see a reason.
- Shashank
> Regards,
> Animesh
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