On Sat, Sep 07, 2019 at 11:19:55PM +0000, Mun, Gwan-gyeong wrote: > On Fri, 2019-09-06 at 09:24 -0400, Ilia Mirkin wrote: > > On Fri, Sep 6, 2019 at 7:43 AM Ville Syrjälä > > <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > > > On Fri, Sep 06, 2019 at 11:31:55AM +0000, Shankar, Uma wrote: > > > > > > > > > -----Original Message----- > > > > > From: Ilia Mirkin <imirkin@xxxxxxxxxxxx> > > > > > Sent: Tuesday, September 3, 2019 6:12 PM > > > > > To: Mun, Gwan-gyeong <gwan-gyeong.mun@xxxxxxxxx> > > > > > Cc: Intel Graphics Development <intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > > > > >; Shankar, Uma > > > > > <uma.shankar@xxxxxxxxx>; dri-devel < > > > > > dri-devel@xxxxxxxxxxxxxxxxxxxxx> > > > > > Subject: Re: [PATCH v4 3/7] drm: Add DisplayPort colorspace > > > > > property > > > > > > > > > > So how would this work with a DP++ connector? Should it list > > > > > the HDMI or DP > > > > > properties? Or do we need a custom property checker which is > > > > > aware of what is > > > > > currently plugged in to validate the values? > > > > > > > > AFAIU For DP++ cases, we detect what kind of sink its driving DP > > > > or HDMI (with a passive dongle). > > > > Based on the type of sink detected, we should expose DP or HDMI > > > > colorspaces to userspace. > > > > > > For i915 DP connector always drives DP mode, HDMI connector always > > > drives > > > HDMI mode, even when the physical connector is DP++. > > > > Right, i915 creates 2 connectors, while nouveau, radeon, and amdgpu > > create 1 connector (not sure about other drivers) for a single > > physical DP++ socket. Since we supply the list of valid values at the > > time of creating the connector, we can't know at that point whether > > in > > the future a HDMI or DP will be plugged into it. > > > > -ilia > Ilia, does it mean that the drm_connector type is > DRM_MODE_CONNECTOR_DisplayPort and protocol is DP++ mode? > > And Ville and Uma, when we are useing dp active dongle (DP to HDMI > dongle and DP branch device is HDMI) should we expose HDMI colorspace? We still set it up via DP MSA/VSC no? In that case it should follow the DP spec I think. LSPCON is probably different because we manually generate the AVI infoframe for it. But I'm not sure how we're going to reconcile that with the DP stuff we also set up for it. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
