If the object needs to be migrated, it may will need GPU relocs and so have an exclusive fence showing up in the write domain. Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- tests/i915/gem_exec_balancer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c index cda156ea6..407dc0eca 100644 --- a/tests/i915/gem_exec_balancer.c +++ b/tests/i915/gem_exec_balancer.c @@ -830,10 +830,10 @@ static void busy(int i915) do_ioctl(i915, DRM_IOCTL_I915_GEM_BUSY, &busy); igt_assert_eq_u32(busy.busy, 1u << (class + 16)); - /* Queued(read): expected class */ + /* Queued(read, maybe write if being migrated): expected class */ busy.handle = spin[1]->handle; do_ioctl(i915, DRM_IOCTL_I915_GEM_BUSY, &busy); - igt_assert_eq_u32(busy.busy, 1u << (class + 16)); + igt_assert_eq_u32(busy.busy & 0xffff << 16, 1u << (class + 16)); /* Queued(write): expected class */ busy.handle = scratch; -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
