Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > Quite rarely we see that the CS completion event fires before the > breadcrumb is coherent, which presumably is a result of the CS_STALL not > waiting for the post-sync operation. Try following in a DC_FLUSH into > the following pipecontrol to see if that makes any difference. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> Acked-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 80a3f1dbb456..48046d445733 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -2971,6 +2971,7 @@ static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) > /* XXX flush+write+CS_STALL all in one upsets gem_concurrent_blt:kbl */ > cs = gen8_emit_pipe_control(cs, > PIPE_CONTROL_FLUSH_ENABLE | > + PIPE_CONTROL_DC_FLUSH_ENABLE | > PIPE_CONTROL_CS_STALL, > 0); > > -- > 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
