== Series Details == Series: series starting with [CI,1/8] drm/i915/tgl: Guard and warn if more than one eDP panel is present URL : https://patchwork.freedesktop.org/series/65835/ State : warning == Summary == $ dim checkpatch origin/drm-tip 66944057d935 drm/i915/tgl: Guard and warn if more than one eDP panel is present 924d4c2a7635 drm/i915: Do not read PSR2 register in transcoders without PSR2 5cf3150716e9 drm/i915/tgl: Add maximum resolution supported by PSR2 HW d6cd62d8c071 drm: Add for_each_oldnew_intel_crtc_in_state_reverse() -:30: WARNING:LONG_LINE: line over 100 characters #30: FILE: drivers/gpu/drm/i915/display/intel_display.h:414: +#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \ -:30: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects? #30: FILE: drivers/gpu/drm/i915/display/intel_display.h:414: +#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \ + for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \ + (__i) >= 0 && \ + ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \ + (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \ + (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \ + (__i)--) \ + for_each_if(crtc) -:30: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects? #30: FILE: drivers/gpu/drm/i915/display/intel_display.h:414: +#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \ + for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \ + (__i) >= 0 && \ + ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \ + (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \ + (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \ + (__i)--) \ + for_each_if(crtc) -:30: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects? #30: FILE: drivers/gpu/drm/i915/display/intel_display.h:414: +#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \ + for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \ + (__i) >= 0 && \ + ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \ + (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \ + (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \ + (__i)--) \ + for_each_if(crtc) total: 0 errors, 1 warnings, 3 checks, 15 lines checked e8738b1fb9e5 drm/i915: Disable pipes in reverse order 02ae060eccae drm/i915/tgl: Implement TGL DisplayPort training sequence ab96dab7e120 drm/i915/tgl: Do not apply WaIncreaseDefaultTLBEntries from GEN12 onwards 5f332adbcb4b drm/i915/tgl/perf: use the same oa ctx_id format as icl _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
