Quoting Prathap Kumar Valsan (2019-08-26 00:35:27) > To provide shared last-level-cache isolation to cpu workloads running > concurrently with gpu workloads, the gpu allocation of cache lines needs > to be restricted to certain ways. Currently GPU hardware supports four > class-of-service(CLOS) levels and there is an associated way-mask for > each CLOS. > > Hardware supports reading supported way-mask configuration for GPU using > a bios pcode interface. The supported way-masks and the one currently > active is communicated to userspace via a sysfs file--closctrl. Admin user > can then select a new mask by writing the mask value to the file. What impact does this have on inflight work? Do you need to drain the submission queue, change the global registers, force an invalidation and then restart? Can it be done from inside the GPU so that it is serialised with on-going submission? -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
