== Series Details == Series: Tiger Lake batch 3 (rev5) URL : https://patchwork.freedesktop.org/series/65290/ State : warning == Summary == $ dim checkpatch origin/drm-tip 385d0cea263f drm/i915/tgl: Move GTCR register to cope with GAM MMIO address remap -:28: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #28: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h:87: +#define GEN12_GUC_TLB_INV_CR_INVALIDATE (1<<0) ^ total: 0 errors, 0 warnings, 1 checks, 25 lines checked 2f4032c673ce drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating 01ce36bb2bfa drm/i915/psr: Only handle interruptions of the transcoder in use -:230: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'trans' - possible side-effects? #230: FILE: drivers/gpu/drm/i915/i915_reg.h:4228: +#define _EDP_PSR_TRANS_SHIFT(trans) ((trans) == TRANSCODER_EDP ? \ + 0 : ((trans) + 1) * 8) total: 0 errors, 0 warnings, 1 checks, 204 lines checked a2bf1ac1f4f0 drm/i915/bdw+: Enable PSR in any eDP port 2c444eefb88f drm/i915: Guard and warn if more than one eDP panel is present 04f3d0338d3f drm/i915: Do not read PSR2 register in transcoders without PSR2 c7a7a115467e drm/i915/tgl: PSR link standby is not supported anymore 6c29d1d87d2d drm/i915/tgl: Access the right register when handling PSR interruptions 4962b6d88797 drm/i915/tgl: Add maximum resolution supported by PSR2 HW 04c9257c9791 drm/i915: Add for_each_new_intel_connector_in_state() -:24: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #24: FILE: drivers/gpu/drm/i915/display/intel_display.h:414: +#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \ + for ((__i) = 0; \ + (__i) < (__state)->base.num_connector; \ + (__i)++) \ + for_each_if ((__state)->base.connectors[__i].ptr && \ + ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \ + (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1)) -:24: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects? #24: FILE: drivers/gpu/drm/i915/display/intel_display.h:414: +#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \ + for ((__i) = 0; \ + (__i) < (__state)->base.num_connector; \ + (__i)++) \ + for_each_if ((__state)->base.connectors[__i].ptr && \ + ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \ + (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1)) -:24: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects? #24: FILE: drivers/gpu/drm/i915/display/intel_display.h:414: +#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \ + for ((__i) = 0; \ + (__i) < (__state)->base.num_connector; \ + (__i)++) \ + for_each_if ((__state)->base.connectors[__i].ptr && \ + ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \ + (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1)) -:28: WARNING:SPACING: space prohibited between function name and open parenthesis '(' #28: FILE: drivers/gpu/drm/i915/display/intel_display.h:418: + for_each_if ((__state)->base.connectors[__i].ptr && \ -:29: WARNING:LONG_LINE: line over 100 characters #29: FILE: drivers/gpu/drm/i915/display/intel_display.h:419: + ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \ -:30: WARNING:LONG_LINE: line over 100 characters #30: FILE: drivers/gpu/drm/i915/display/intel_display.h:420: + (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1)) total: 1 errors, 3 warnings, 2 checks, 14 lines checked 8ff0f4dfd8d7 drm: Add for_each_oldnew_intel_crtc_in_state_reverse() -:28: WARNING:LONG_LINE: line over 100 characters #28: FILE: drivers/gpu/drm/i915/display/intel_display.h:422: +#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \ -:28: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects? #28: FILE: drivers/gpu/drm/i915/display/intel_display.h:422: +#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \ + for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \ + (__i) >= 0 && \ + ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \ + (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \ + (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \ + (__i)--) \ + for_each_if(crtc) -:28: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects? #28: FILE: drivers/gpu/drm/i915/display/intel_display.h:422: +#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \ + for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \ + (__i) >= 0 && \ + ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \ + (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \ + (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \ + (__i)--) \ + for_each_if(crtc) -:28: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects? #28: FILE: drivers/gpu/drm/i915/display/intel_display.h:422: +#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \ + for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \ + (__i) >= 0 && \ + ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \ + (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \ + (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \ + (__i)--) \ + for_each_if(crtc) total: 0 errors, 1 warnings, 3 checks, 15 lines checked ac6110ed3d55 drm/i915: Disable pipes in reverse order 4e72fd9a7b1a FIXME: drm/i915/tgl: Select master transcoder in DP MST -:26: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #26: Add FIXME. From Jani: double check PIPE_CONF_CHECK_I(mst_master_trans) - it's total: 0 errors, 1 warnings, 0 checks, 325 lines checked 2732c013a2e5 drm/i915/tgl: move DP_TP_* to transcoder 82a4ff669aa6 drm/i915/tgl: Implement TGL DisplayPort training sequence e44fa908a435 drm/i915/tgl: Do not apply WaIncreaseDefaultTLBEntries from GEN12 onwards 5a65c5bddfa6 FIXME: drm/i915/tgl: Register state context definition for Gen12 53d10786309a drm/i915/tgl/perf: use the same oa ctx_id format as icl 6fd7e43b7477 drm/i915/tgl: Gen-12 display loses Yf tiling and legacy CCS support 32f171b41ca7 drm/framebuffer/tgl: Format modifier for Intel Gen-12 render compression fca4dac975ee drm/i915/tgl: Gen-12 render decompression fc2223c91ae2 drm/framebuffer/tgl: Format modifier for Intel Gen-12 media compression 62b7125d235e drm/i915/tgl: Gen-12 media compression -:74: WARNING:MISSING_BREAK: Possible switch case/default not preceded by break or fallthrough comment #74: FILE: drivers/gpu/drm/i915/display/intel_display.c:2523: + case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS: total: 0 errors, 1 warnings, 0 checks, 134 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
