Quoting Stuart Summers (2019-08-22 19:32:09) > Add a subslice stride calculation when setting subslices. This > aligns more closely with the userspace expectation of the subslice > mask structure. > > v2: Use local variable for subslice_mask on HSW and > clean up a few other subslice_mask local variable > changes > v3: Add GEM_BUG_ON for ss_stride to prevent array overflow (Chris) > Split main set function and refactors in intel_device_info.c > into separate patches (Chris) > v4: Reduce ss_stride size check when setting subslices per slice > based on actual expected max stride (Chris) > Move that GEM_BUG_ON check for the ss_stride out to the patch > which adds the ss_stride > > Signed-off-by: Stuart Summers <stuart.summers@xxxxxxxxx> > --- > drivers/gpu/drm/i915/gt/intel_sseu.c | 8 ++++++-- > drivers/gpu/drm/i915/gt/intel_sseu.h | 2 +- > 2 files changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c > index 3a5db0dbac72..a0d32270248c 100644 > --- a/drivers/gpu/drm/i915/gt/intel_sseu.c > +++ b/drivers/gpu/drm/i915/gt/intel_sseu.c > @@ -33,9 +33,13 @@ intel_sseu_subslice_total(const struct sseu_dev_info *sseu) > } > > void intel_sseu_set_subslices(struct sseu_dev_info *sseu, int slice, > - u8 ss_mask) > + u32 ss_mask) > { > - sseu->subslice_mask[slice] = ss_mask; > + int i, offset = slice * sseu->ss_stride; > + > + for (i = 0; i < sseu->ss_stride; i++) > + sseu->subslice_mask[offset + i] = > + (ss_mask >> (BITS_PER_BYTE * i)) & 0xff; Is it not memcpy(&sseu->sublice_mask[offset], &ss_mask, sseu->ss_stride); ? -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx