On Sat, Aug 17, 2019 at 02:38:28AM -0700, Lucas De Marchi wrote:
> From: José Roberto de Souza <jose.souza@xxxxxxxxx>
>
> According to PSR2_CTL definition in BSpec there is only one instance of
> PSR2_CTL. Platforms gen < 12 with EDP transcoder only support PSR2 on
> TRANSCODER_EDP while on TGL PSR2 is only supported by TRANSCODER_A.
>
> Since BDW PSR is allowed on any port, but we need to restrict by transcoder.
>
> BSpec: 7713
> BSpec: 20584
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 77232f6bca17..4353270bd65c 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -534,6 +534,16 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
> I915_WRITE(EDP_PSR2_CTL(dev_priv->psr.transcoder), val);
> }
>
> +static bool
> +_psr2_supported_in_trans(struct drm_i915_private *dev_priv,
> + enum transcoder trans)
I think a more customary name would be something like
transcoder_has_psr2() or transcoder_supports_psr2().
> +{
> + if (INTEL_GEN(dev_priv) >= 12)
> + return trans == TRANSCODER_A;
> + else
> + return trans == TRANSCODER_EDP;
> +}
> +
> static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> struct intel_crtc_state *crtc_state)
> {
> @@ -545,6 +555,12 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> if (!dev_priv->psr.sink_psr2_support)
> return false;
>
> + if (!_psr2_supported_in_trans(dev_priv, crtc_state->cpu_transcoder)) {
> + DRM_DEBUG_KMS("PSR2 not supported in transcoder %s\n",
> + transcoder_name(crtc_state->cpu_transcoder));
> + return false;
> + }
> +
> /*
> * DSC and PSR2 cannot be enabled simultaneously. If a requested
> * resolution requires DSC to be enabled, priority is given to DSC
> --
> 2.21.0
>
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--
Ville Syrjälä
Intel
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