Existing mmio-reg-write need intel_uncore handle which is part of dev_priv structure and the same design is followed by adding dsb handle in dev_priv for programming registers through DSB. I915_WRITE is modified to check for register capability and call dsb-reg-write based on its capability. No changes in I915_READ definition as DSB do not have support to read any register. Cc: Jani Nikula <jani.nikula@xxxxxxxxx> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> Signed-off-by: Animesh Manna <animesh.manna@xxxxxxxxx> --- drivers/gpu/drm/i915/display/intel_dsb.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index 4fe8cac6246a..6f1999140085 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -123,7 +123,7 @@ void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val) u32 *buf = dsb->cmd_buf; if (!buf) { - I915_WRITE(reg, val); + intel_uncore_write(&(dev_priv)->uncore, reg, val); return; } diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 643fd6d6fd73..7aed957362c9 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1753,6 +1753,8 @@ struct drm_i915_private { /* Mutex to protect the above hdcp component related values. */ struct mutex hdcp_comp_mutex; + struct intel_dsb *dsb; + /* * NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch * will be rejected. Instead look for a better place. @@ -2414,7 +2416,9 @@ int i915_reg_read_ioctl(struct drm_device *dev, void *data, intel_uncore_##op__(&(dev_priv__)->uncore, __VA_ARGS__) #define I915_READ(reg__) __I915_REG_OP(read, dev_priv, (reg__)) -#define I915_WRITE(reg__, val__) __I915_REG_OP(write, dev_priv, (reg__), (val__)) +#define I915_WRITE(reg__, val__) \ + (reg__.cap) ? intel_dsb_reg_write(dev_priv->dsb, (reg__), (val__)) : \ + __I915_REG_OP(write, dev_priv, (reg__), (val__)) #define POSTING_READ(reg__) __I915_REG_OP(posting_read, dev_priv, (reg__)) -- 2.22.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx