On 2019-08-20 at 15:33:24 -0700, José Roberto de Souza wrote: > According to PSR2_CTL definition in BSpec there is only one instance > of PSR2_CTL. Platforms gen < 12 with EDP transcoder only support PSR2 > on TRANSCODER_EDP while on TGL PSR2 is only supported by > TRANSCODER_A. > > Since BDW PSR is allowed on any port, but we need to restrict by > transcoder. > > v8: Renamed _psr2_supported_in_trans() to psr2_supported() (Lucas) > > BSpec: 7713 > BSpec: 20584 > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Reviewed-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > index 77232f6bca17..1dafe326edda 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -534,6 +534,15 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) > I915_WRITE(EDP_PSR2_CTL(dev_priv->psr.transcoder), val); > } > > +static bool > +psr2_supported(struct drm_i915_private *dev_priv, enum transcoder trans) > +{ > + if (INTEL_GEN(dev_priv) >= 12) > + return trans == TRANSCODER_A; > + else > + return trans == TRANSCODER_EDP; > +} > + > static bool intel_psr2_config_valid(struct intel_dp *intel_dp, > struct intel_crtc_state *crtc_state) > { > @@ -545,6 +554,12 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, > if (!dev_priv->psr.sink_psr2_support) > return false; > > + if (!psr2_supported(dev_priv, crtc_state->cpu_transcoder)) { > + DRM_DEBUG_KMS("PSR2 not supported in transcoder %s\n", > + transcoder_name(crtc_state->cpu_transcoder)); > + return false; > + } > + Looks good to me. Reviewed-by: Anshuman Gupta <anshuman.gupta@xxxxxxxxx> > /* > * DSC and PSR2 cannot be enabled simultaneously. If a requested > * resolution requires DSC to be enabled, priority is given to DSC > -- > 2.22.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx