Patches 1 and 2 pushed to dinq as both are reviewed and are just moving code with no behavior changes. On Tue, 2019-08-06 at 16:31 -0700, Lucas De Marchi wrote: > On Tue, Jul 30, 2019 at 03:47:51PM -0700, Jose Souza wrote: > > A new macro that is going to be added in a further patch will need > > to > > adjust the offset returned by _MMIO_TRANS2(), so here adding > > _TRANS2() and moving most of the implementation of _MMIO_TRANS2() > > to > > it and while at it taking the opportunity to rename pipe to trans. > > > > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiya@xxxxxxxxx> > > Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiya@xxxxxxxxx> > > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_reg.h | 7 ++++--- > > 1 file changed, 4 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > > b/drivers/gpu/drm/i915/i915_reg.h > > index 21306dd3790a..f4e1acc936b3 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -251,9 +251,10 @@ static inline bool > > i915_mmio_reg_valid(i915_reg_t reg) > > #define _MMIO_PIPE2(pipe, reg) _MMIO(INTEL_INFO(dev_pr > > iv)->pipe_offsets[pipe] - \ > > INTEL_INFO(dev_priv)- > > >pipe_offsets[PIPE_A] + (reg) + \ > > DISPLAY_MMIO_BASE(dev_pri > > v)) > > -#define _MMIO_TRANS2(pipe, reg) _MMIO(INTEL_INFO(dev_pr > > iv)->trans_offsets[(pipe)] - \ > > - INTEL_INFO(dev_priv)- > > >trans_offsets[TRANSCODER_A] + (reg) + \ > > - DISPLAY_MMIO_BASE(dev_pri > > v)) > > +#define _TRANS2(tran, reg) (INTEL_INFO(dev_priv)- > > >trans_offsets[(tran)] - \ > > + INTEL_INFO(dev_priv)- > > >trans_offsets[TRANSCODER_A] + (reg) + \ > > + DISPLAY_MMIO_BASE(dev_priv)) > > a pure move with no behavior change > > > Reviewed-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> > > Lucas De Marchi > > > > +#define _MMIO_TRANS2(tran, reg) _MMIO(_TRANS2(tran, > > reg)) > > #define _CURSOR2(pipe, reg) _MMIO(INTEL_INFO(dev_priv)- > > >cursor_offsets[(pipe)] - \ > > INTEL_INFO(dev_priv)- > > >cursor_offsets[PIPE_A] + (reg) + \ > > DISPLAY_MMIO_BASE(dev_pri > > v)) > > -- > > 2.22.0 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
