== Series Details == Series: DC3CO Support for TGL (rev2) URL : https://patchwork.freedesktop.org/series/64923/ State : warning == Summary == $ dim checkpatch origin/drm-tip 15a54f3bbd2d drm/i915/tgl: Add DC3CO required register and bits fdc2aa531791 drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask d3de049eb81d drm/i915/tgl: Add power well to enable DC3CO state -:53: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.rst #53: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:810: + udelay(200); total: 0 errors, 0 warnings, 1 checks, 103 lines checked 33b33a568003 drm/i915/tgl: mutual exclusive handling for DC3CO and DC5/6 93607c38915a drm/i915/tgl: Add helper function to prefer dc3co over dc5 805147a87236 drm/i915/tgl: Add VIDEO power domain a3fb8832856a drm/i915/tgl: DC3CO PSR2 helper d56b369fa284 drm/i915/tgl: switch between dc3co and dc5 based on display idleness 8658e38e3d18 drm/i915/tgl: Add DC3CO counter in i915_dmc_info _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
