User applications might need to verify hardware configuration
of the MOCS entries. To facilitate this debug, add a new debugfs
entry to allow a dump of the MOCS state to verify expected values
are set by i915.
Signed-off-by: Stuart Summers <stuart.summers@xxxxxxxxx>
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 50 ++++++++++++++++++++++++++++
drivers/gpu/drm/i915/gt/intel_mocs.h | 3 ++
drivers/gpu/drm/i915/i915_debugfs.c | 12 +++++++
3 files changed, 65 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 728704bbbe18..fea8ef2fd2aa 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -625,6 +625,56 @@ int intel_mocs_emit(struct i915_request *rq)
return 0;
}
+static void
+intel_mocs_dump_l3cc_table(struct intel_gt *gt, struct drm_printer *p)
+{
+ struct intel_uncore *uncore = gt->uncore;
+ struct drm_i915_mocs_table table;
+ unsigned int i;
+
+ if (!get_mocs_settings(gt, &table))
+ return;
+
+ drm_printf(p, "l3cc:\n");
+
+ for (i = 0; i < table.n_entries / 2; i++) {
+ u32 reg = intel_uncore_read(uncore, GEN9_LNCFCMOCS(i));
+
+ drm_printf(p, " MOCS[%d]: 0x%x\n", i * 2, reg & 0xffff);
+ drm_printf(p, " MOCS[%d]: 0x%x\n", i * 2 + 1, reg >> 16);
+ }
+}
+
+static void
+intel_mocs_dump_global(struct intel_gt *gt, struct drm_printer *p)
+{
+ struct intel_uncore *uncore = gt->uncore;
+ struct drm_i915_mocs_table table;
+ unsigned int i;
+
+ GEM_BUG_ON(!HAS_GLOBAL_MOCS_REGISTERS(gt->i915));
+
+ if (!get_mocs_settings(gt, &table))
+ return;
+
+ if (GEM_DEBUG_WARN_ON(table.size > table.n_entries))
+ return;
+
+ drm_printf(p, "global:\n");
+
+ for (i = 0; i < table.n_entries; i++)
+ drm_printf(p, " MOCS[%d]: 0x%x\n",
+ i, intel_uncore_read(uncore, GEN12_GLOBAL_MOCS(i)));
+}
+
+void intel_mocs_show_info(struct intel_gt *gt, struct drm_printer *p)
+{
+ intel_mocs_dump_l3cc_table(gt, p);
+
+ if (HAS_GLOBAL_MOCS_REGISTERS(gt->i915))
+ intel_mocs_dump_global(gt, p);
+}
+
void intel_mocs_init(struct intel_gt *gt)
{
intel_mocs_init_l3cc_table(gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.h b/drivers/gpu/drm/i915/gt/intel_mocs.h
index 2ae816b7ca19..0ef95ce818d3 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.h
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.h
@@ -24,6 +24,8 @@
#ifndef INTEL_MOCS_H
#define INTEL_MOCS_H
+#include <drm/drm_print.h>
+
/**
* DOC: Memory Objects Control State (MOCS)
*
@@ -55,6 +57,7 @@ struct intel_gt;
void intel_mocs_init(struct intel_gt *gt);
void intel_mocs_init_engine(struct intel_engine_cs *engine);
+void intel_mocs_show_info(struct intel_gt *gt, struct drm_printer *p);
int intel_mocs_emit(struct i915_request *rq);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 3b15266c54fd..1aa022eb2c3d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -41,6 +41,7 @@
#include "gem/i915_gem_context.h"
#include "gt/intel_reset.h"
+#include "gt/intel_mocs.h"
#include "gt/uc/intel_guc_submission.h"
#include "i915_debugfs.h"
@@ -76,6 +77,16 @@ static int i915_capabilities(struct seq_file *m, void *data)
return 0;
}
+static int show_mocs_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *i915 = node_to_i915(m->private);
+ struct drm_printer p = drm_seq_file_printer(m);
+
+ intel_mocs_show_info(&i915->gt, &p);
+
+ return 0;
+}
+
static char get_pin_flag(struct drm_i915_gem_object *obj)
{
return obj->pin_global ? 'p' : ' ';
@@ -4352,6 +4363,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_sseu_status", i915_sseu_status, 0},
{"i915_drrs_status", i915_drrs_status, 0},
{"i915_rps_boost_info", i915_rps_boost_info, 0},
+ {"i915_mocs_info", show_mocs_info, 0},
};
#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
--
2.22.0
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