== Series Details == Series: Tiger Lake: MOCS table handling URL : https://patchwork.freedesktop.org/series/64275/ State : warning == Summary == $ dim checkpatch origin/drm-tip 80a9b7285063 drm/i915/tgl: Move fault registers to their new offset 9efbb1606638 drm/i915/tgl: Define MOCS entries for Tigerlake -:16: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #16: terminology to what it actually is: L1 is implicitly enabled (from Daniele) total: 0 errors, 1 warnings, 0 checks, 65 lines checked 169b3fd24700 drm/i915/tgl: Tigerlake only has global MOCS registers -:17: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #17: v2: Move the changes to the fault registers to a separate commit - the old ones total: 0 errors, 1 warnings, 0 checks, 123 lines checked f17795a44dfc drm/i915: Move MOCS setup to intel_mocs.c _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
