On Mon, Jul 22, 2019 at 04:13:25PM -0700, Dhinakaran Pandiyan wrote: > A single 32-bit PSR2 training pattern field follows the sixteen element > array of PSR table entries in the VBT spec. But, we incorrectly define > this PSR2 field for each of the PSR table entries. As a result, the PSR1 > training pattern duration for any panel_type != 0 will be parsed > incorrectly. Secondly, PSR2 training pattern durations for VBTs with bdb > version >= 226 will also be wrong. > > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Cc: José Roberto de Souza <jose.souza@xxxxxxxxx> > Cc: stable@xxxxxxxxxxxxxxx > Cc: stable@xxxxxxxxxxxxxxx #v5.2 > Fixes: 88a0d9606aff ("drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time") > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088 > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183 > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Reviewed-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > Acked-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Tested-by: François Guerraz <kubrick@xxxxxxxx> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Link: https://patchwork.freedesktop.org/patch/msgid/20190717223451.2595-1-dhinakaran.pandiyan@xxxxxxxxx > (cherry picked from commit b5ea9c9337007d6e700280c8a60b4e10d070fb53) There is no such commit in Linus's kernel tree :( _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx