On 07/23/2019 06:37 PM, Chris Wilson wrote: > Quoting Xiaolin Zhang (2019-07-23 12:31:57) >> To enable vgpu pv features, we need to setup a shared memory page >> which will be used for data exchange directly accessed between both >> guest and backend i915 driver to avoid emulation trap cost. >> >> guest i915 will allocate this page memory and then pass it's physical >> address to backend i915 driver through PVINFO register so that backend i915 >> driver can access this shared page meory without any trap cost with the >> help form hyperviser's read guest gpa functionality. >> >> guest i915 will send VGT_G2V_SHARED_PAGE_SETUP notification to host GVT >> once shared memory setup finished. >> >> the layout of the shared_page also defined as well in this patch which >> is used for pv features implementation. >> >> v0: RFC. >> v1: addressed RFC comment to move both shared_page_lock and shared_page >> to i915_virtual_gpu structure. >> v2: packed i915_virtual_gpu structure. >> v3: added SHARED_PAGE_SETUP g2v notification for pv shared_page setup >> v4: added intel_vgpu_setup_shared_page() in i915_vgpu_pv.c. >> v5: per engine desc data in shared memory. >> v6: added version support in shared memory (Zhenyu). >> v7: rebase. >> >> Signed-off-by: Xiaolin Zhang <xiaolin.zhang@xxxxxxxxx> >> --- >> drivers/gpu/drm/i915/i915_drv.h | 4 +- >> drivers/gpu/drm/i915/i915_pvinfo.h | 5 ++- >> drivers/gpu/drm/i915/i915_vgpu.c | 85 ++++++++++++++++++++++++++++++++++++++ >> drivers/gpu/drm/i915/i915_vgpu.h | 17 ++++++++ >> 4 files changed, 109 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h >> index fa5dc47..48cf141 100644 >> --- a/drivers/gpu/drm/i915/i915_drv.h >> +++ b/drivers/gpu/drm/i915/i915_drv.h >> @@ -1080,7 +1080,9 @@ struct i915_virtual_gpu { >> bool active; >> u32 caps; >> u32 pv_caps; >> -}; >> + >> + struct i915_virtual_gpu_pv *pv; >> +} __packed; >> >> /* used in computing the new watermarks state */ >> struct intel_wm_config { >> diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h >> index ad398b4..3c63603 100644 >> --- a/drivers/gpu/drm/i915/i915_pvinfo.h >> +++ b/drivers/gpu/drm/i915/i915_pvinfo.h >> @@ -48,6 +48,7 @@ enum vgt_g2v_type { >> VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY, >> VGT_G2V_EXECLIST_CONTEXT_CREATE, >> VGT_G2V_EXECLIST_CONTEXT_DESTROY, >> + VGT_G2V_SHARED_PAGE_SETUP, >> VGT_G2V_MAX, >> }; >> >> @@ -112,7 +113,9 @@ struct vgt_if { >> >> u32 pv_caps; >> >> - u32 rsv7[0x200 - 25]; /* pad to one page */ >> + u64 shared_page_gpa; >> + >> + u32 rsv7[0x200 - 27]; /* pad to one page */ >> } __packed; >> >> #define vgtif_offset(x) (offsetof(struct vgt_if, x)) >> diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c >> index 9b37dd1..998cf6a 100644 >> --- a/drivers/gpu/drm/i915/i915_vgpu.c >> +++ b/drivers/gpu/drm/i915/i915_vgpu.c >> @@ -145,6 +145,7 @@ static void vgt_deballoon_space(struct i915_ggtt *ggtt, >> */ >> void intel_vgt_deballoon(struct i915_ggtt *ggtt) > This addendum is nothing to do with the i915_ggtt cleanup. > >> { >> + struct drm_i915_private *i915 = ggtt->vm.i915; >> int i; >> >> if (!intel_vgpu_active(ggtt->vm.i915)) >> @@ -154,6 +155,9 @@ void intel_vgt_deballoon(struct i915_ggtt *ggtt) >> >> for (i = 0; i < 4; i++) >> vgt_deballoon_space(ggtt, &bl_info.space[i]); >> + >> + if (i915->vgpu.pv) >> + free_page((unsigned long)i915->vgpu.pv->shared_page); > __free_page(shared_page); Thanks, will change this and move to another place in next revision. -BRs, Xiaolin > >> } >> >> static int vgt_balloon_space(struct i915_ggtt *ggtt, >> @@ -309,6 +313,81 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt) >> * i915 vgpu PV support for Linux >> */ >> >> +/* >> + * shared_page setup for VGPU PV features >> + */ >> +static int intel_vgpu_setup_shared_page(struct drm_i915_private *dev_priv, >> + void __iomem *shared_area) >> +{ >> + void __iomem *addr; >> + struct i915_virtual_gpu_pv *pv; >> + struct gvt_shared_page *base; >> + u64 gpa; >> + u16 ver_maj, ver_min; >> + >> + /* We allocate 1 page shared between guest and GVT for data exchange. >> + * ___________..................... >> + * |head | | >> + * |___________|.................. PAGE/8 >> + * |PV ELSP | >> + * :___________....................PAGE/4 >> + * |desc (SEND) | >> + * | | >> + * :_______________________________PAGE/2 >> + * |cmds (SEND) | >> + * | | >> + * | | >> + * | | >> + * | | >> + * |_______________________________| >> + * >> + * 0 offset: PV version area >> + * PAGE/8 offset: per engine workload submission data area >> + * PAGE/4 offset: PV command buffer command descriptor area >> + * PAGE/2 offset: PV command buffer command data area >> + */ >> + >> + base = (struct gvt_shared_page *)get_zeroed_page(GFP_KERNEL); >> + if (!base) { >> + DRM_INFO("out of memory for shared page memory\n"); > DRM_INFO is for providing the user with useful information; not dropping > debug messages. If you do want to address the user, I'd recommend > dev_info > -Chris thanks, will change this next revision. -BRs, Xiaolin > _______________________________________________ > intel-gvt-dev mailing list > intel-gvt-dev@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx