On Wed, 2019-07-17 at 14:35 +0300, Ville Syrjälä wrote:
> On Tue, Jul 16, 2019 at 03:03:21PM -0700, Dhinakaran Pandiyan wrote:
> > A single 32-bit PSR2 training pattern field follows the sixteen element
> > array of PSR table entries in the VBT spec. But, we incorrectly define
> > this PSR2 field for each of the PSR table entries. As a result, the PSR1
> > training pattern duration for any panel_type != 0 will be parsed
> > incorrectly. Secondly, PSR2 training pattern durations for VBTs with bdb
> > version >= 226 will also be wrong.
> >
> > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> > Cc: José Roberto de Souza <jose.souza@xxxxxxxxx>
> > Fixes: 88a0d9606aff ("drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time")
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Please sync the igt copy after landing this.
Will do, thanks!
-DK
>
> > ---
> > drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_vbt_defs.h | 6 +++---
> > 2 files changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> > b/drivers/gpu/drm/i915/display/intel_bios.c
> > index 21501d565327..b416b394b641 100644
> > --- a/drivers/gpu/drm/i915/display/intel_bios.c
> > +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> > @@ -766,7 +766,7 @@ parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
> > }
> >
> > if (bdb->version >= 226) {
> > - u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
> > + u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
> >
> > wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
> > switch (wakeup_time) {
> > diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > index 93f5c9d204d6..09cd37fb0b1c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > @@ -481,13 +481,13 @@ struct psr_table {
> > /* TP wake up time in multiple of 100 */
> > u16 tp1_wakeup_time;
> > u16 tp2_tp3_wakeup_time;
> > -
> > - /* PSR2 TP2/TP3 wakeup time for 16 panels */
> > - u32 psr2_tp2_tp3_wakeup_time;
> > } __packed;
> >
> > struct bdb_psr {
> > struct psr_table psr_table[16];
> > +
> > + /* PSR2 TP2/TP3 wakeup time for 16 panels */
> > + u32 psr2_tp2_tp3_wakeup_time;
> > } __packed;
> >
> > /*
> > --
> > 2.17.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
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