Added POWER_DOMAIN_VIDEO power domain and added its helper stuff. POWER_DOMAIN_VIDEO is a hook to "DC5 Off" power well. which can disallow DC5/6 in order to allow dc3co. Cc: jani.nikula@xxxxxxxxx Cc: imre.deak@xxxxxxxxx Cc: animesh.manna@xxxxxxxxx Signed-off-by: Anshuman Gupta <anshuman.gupta@xxxxxxxxx> --- drivers/gpu/drm/i915/display/intel_display_power.c | 3 +++ drivers/gpu/drm/i915/display/intel_display_power.h | 1 + drivers/gpu/drm/i915/i915_drv.h | 6 ++++++ 3 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 62d68e21d5fa..9d29ee460c68 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -122,6 +122,8 @@ intel_display_power_domain_str(struct drm_i915_private *i915, return "VGA"; case POWER_DOMAIN_AUDIO: return "AUDIO"; + case POWER_DOMAIN_VIDEO: + return "VIDEO"; case POWER_DOMAIN_AUX_A: return "AUX_A"; case POWER_DOMAIN_AUX_B: @@ -2762,6 +2764,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, #define TGL_DISPLAY_DC3CO_OFF_POWER_DOMAINS ( \ TGL_PW_2_POWER_DOMAINS | \ + BIT_ULL(POWER_DOMAIN_VIDEO) | \ BIT_ULL(POWER_DOMAIN_MODESET) | \ BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL(POWER_DOMAIN_INIT)) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h index 93ee08de7b06..635b93cf67fd 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.h +++ b/drivers/gpu/drm/i915/display/intel_display_power.h @@ -65,6 +65,7 @@ enum intel_display_power_domain { POWER_DOMAIN_PORT_OTHER, POWER_DOMAIN_VGA, POWER_DOMAIN_AUDIO, + POWER_DOMAIN_VIDEO, POWER_DOMAIN_AUX_A, POWER_DOMAIN_AUX_B, POWER_DOMAIN_AUX_C, diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 4f444718cd1f..72bbc786053e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -360,6 +360,12 @@ struct intel_csr { u32 allowed_dc_mask; intel_wakeref_t wakeref; bool prefer_dc3co; + intel_wakeref_t dc5_wakeref; + /* + * Mutex to protect dc5_wakeref which make maintain proper + * power domain reference count of POWER_DOMAIN_VIDEO + */ + struct mutex dc5_mutex; }; enum i915_cache_level { -- 2.21.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx