On Wed, Jul 03, 2019 at 04:03:53PM -0700, Vivek Kasireddy wrote: > This patch adds support for DPLL4 on EHL that include the > following restrictions: > > - DPLL4 cannot be used with DDIA (combo port A internal eDP usage). > DPLL4 can be used with other DDIs, including DDID > (combo port A external usage). > > - DPLL4 cannot be enabled when DC5 or DC6 are enabled. > > - The DPLL4 enable, lock, power enabled, and power state are connected > to the MGPLL1_ENABLE register. > > v2: (suggestions from Bob Paauwe) > - Rework ehl_get_dpll() function to call intel_find_shared_dpll() and > iterate twice: once for Combo plls and once for MG plls. > > - Use MG pll funcs for DPLL4 instead of creating new ones and modify > mg_pll_enable to include the restrictions for EHL. > > v3: Fix compilation error > > v4: (suggestions from Lucas and Ville) > - Treat DPLL4 as a combo phy PLL and not as MG PLL > - Disable DC states when this DPLL is being enabled > - Reuse icl_get_dpll instead of creating a separate one for EHL > > v5: (suggestion from Ville) > - Refcount the DC OFF power domains during the enabling and disabling > of this DPLL. > > v6: rebase > > v7: (suggestion from Imre) > - Add a new power domain instead of iterating over the domains > assoicated with DC OFF power well. > > v8: (Ville and Imre) > - Rename POWER_DOMAIN_DPLL4 TO POWER_DOMAIN_DPLL_DC_OFF > - Grab a reference in intel_modeset_setup_hw_state() if this > DPLL was already enabled perhaps by BIOS. > - Check for the port type instead of the encoder > > v9: (Ville) > - Move the block of code that grabs a reference to the power domain > POWER_DOMAIN_DPLL_DC_OFF to intel_modeset_readout_hw_state() to ensure > that there is a reference present before this DPLL might get disabled. > > v10: rebase > > Cc: José Roberto de Souza <jose.souza@xxxxxxxxx> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> > Cc: Imre Deak <imre.deak@xxxxxxxxx> > Signed-off-by: Vivek Kasireddy <vivek.kasireddy@xxxxxxxxx> lgtm. Picked up José's r-b from an earlier posting (in the future plese collect those yourself so they don't get lost), and pushed to dinq. Thanks for the patch. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
