On Tue, Jul 02, 2019 at 01:33:26PM +0100, Chris Wilson wrote:
> icl-dsi is dying on suspend/resume at
>
> RIP: 0010:icl_update_active_dpll+0x2c/0xa0 [i915]
>
> so take a guess that it is the primary_port is NULL.
Yes, DSI ports are not intel_digital_ports but use the shared DPLL code.
Not sure why this wasn't caught already earlier.
>
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Reviewed-by: Imre Deak <imre.deak@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 13 ++++---------
> 1 file changed, 4 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 76a2c879efc2..f953971e7c3b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -2883,21 +2883,16 @@ static void icl_update_active_dpll(struct intel_atomic_state *state,
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> struct intel_digital_port *primary_port;
> - enum icl_port_dpll_id port_dpll_id;
> + enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT;
>
> primary_port = encoder->type == INTEL_OUTPUT_DP_MST ?
> enc_to_mst(&encoder->base)->primary :
> enc_to_dig_port(&encoder->base);
>
> - switch (primary_port->tc_mode) {
> - case TC_PORT_TBT_ALT:
> - port_dpll_id = ICL_PORT_DPLL_DEFAULT;
> - break;
> - case TC_PORT_DP_ALT:
> - case TC_PORT_LEGACY:
> + if (primary_port &&
> + (primary_port->tc_mode == TC_PORT_DP_ALT ||
> + primary_port->tc_mode == TC_PORT_LEGACY))
> port_dpll_id = ICL_PORT_DPLL_MG_PHY;
> - break;
> - }
>
> icl_set_active_port_dpll(crtc_state, port_dpll_id);
> }
> --
> 2.20.1
>
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