== Series Details == Series: series starting with [01/10] drm/i915/gtt: No need to zero the table for page dirs URL : https://patchwork.freedesktop.org/series/62122/ State : warning == Summary == $ dim checkpatch origin/drm-tip a0c0d406ac14 drm/i915/gtt: No need to zero the table for page dirs 0a2593a39056 drm/i915/gtt: Use a common type for page directories -:680: CHECK:BRACES: Blank lines aren't necessary after an open brace '{' #680: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1504: gen8_for_each_pml4e(pdp, pml4, start, length, pml4e) { + total: 0 errors, 0 warnings, 1 checks, 1051 lines checked a580ad51d6ce drm/i915/gtt: Introduce init_pd_with_page 464bd2d5e1a9 drm/i915/gtt: Introduce init_pd b8cb2f9e813d drm/i915/gtt: Generalize alloc_pd ff23d85ebb8f drm/i915/gtt: pde entry encoding is identical -:53: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pd' - possible side-effects? #53: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:733: +#define init_pd(vm, pd, to) { \ + GEM_DEBUG_BUG_ON(!pd_has_phys_page(pd)); \ + fill_px((vm), (pd), gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ + memset_p((pd)->entry, (to), 512); \ } -:53: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects? #53: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:733: +#define init_pd(vm, pd, to) { \ + GEM_DEBUG_BUG_ON(!pd_has_phys_page(pd)); \ + fill_px((vm), (pd), gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ + memset_p((pd)->entry, (to), 512); \ } -:76: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pd' - possible side-effects? #76: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:750: +#define set_pd_entry(pd, pde, to) ({ \ + (pd)->entry[(pde)] = (to); \ + __set_pd_entry((pd), (pde), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ +}) -:76: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pde' - possible side-effects? #76: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:750: +#define set_pd_entry(pd, pde, to) ({ \ + (pd)->entry[(pde)] = (to); \ + __set_pd_entry((pd), (pde), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ +}) -:76: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects? #76: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:750: +#define set_pd_entry(pd, pde, to) ({ \ + (pd)->entry[(pde)] = (to); \ + __set_pd_entry((pd), (pde), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ +}) -:82: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pdp' - possible side-effects? #82: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:756: +#define set_pdp_entry(pdp, pdpe, to) ({ \ + (pdp)->entry[(pdpe)] = (to); \ + if (pd_has_phys_page(pdp)) \ + __set_pd_entry((pdp), (pdpe), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\ +}) -:82: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pdpe' - possible side-effects? #82: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:756: +#define set_pdp_entry(pdp, pdpe, to) ({ \ + (pdp)->entry[(pdpe)] = (to); \ + if (pd_has_phys_page(pdp)) \ + __set_pd_entry((pdp), (pdpe), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\ +}) -:82: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects? #82: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:756: +#define set_pdp_entry(pdp, pdpe, to) ({ \ + (pdp)->entry[(pdpe)] = (to); \ + if (pd_has_phys_page(pdp)) \ + __set_pd_entry((pdp), (pdpe), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\ +}) total: 0 errors, 0 warnings, 8 checks, 232 lines checked 6bd860d004cd drm/i915/gtt: Check for physical page for pd entry always cf0c87dc8f77 drm/i915/gtt: Make swapping the pd entry generic -:41: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects? #41: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:776: +#define swap_pd_entry(pd, pde, old, to) \ + __swap_pd_entry((pd), (pde), (old), (to), px_dma(to), gen8_pde_encode) total: 0 errors, 0 warnings, 1 checks, 66 lines checked a5962f1ec818 drm/i915/gtt: Tear down setup and cleanup macros for page dma f33418fc780b drm/i915/gtt: Setup phys pages for 3lvl pdps _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
