On 14/06/2019 10:41, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-14 10:34:06)
On 13/06/2019 17:30, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-13 17:11:43)
On 13/06/2019 14:59, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-13 14:35:24)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e54cd30534dc..b6f450e782e7 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1234,28 +1234,32 @@ static void init_unused_rings(struct intel_gt *gt)
}
}
-int i915_gem_init_hw(struct drm_i915_private *dev_priv)
+static int init_hw(struct intel_gt *gt)
{
+ struct drm_i915_private *i915 = gt->i915;
+ struct intel_uncore *uncore = gt->uncore;
int ret;
- dev_priv->gt.last_init_time = ktime_get();
+ gt->last_init_time = ktime_get();
/* Double layer security blanket, see i915_gem_init() */
- intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
+ intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
- if (HAS_EDRAM(dev_priv) && INTEL_GEN(dev_priv) < 9)
- I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
+ if (HAS_EDRAM(i915) && INTEL_GEN(i915) < 9)
+ intel_uncore_rmw(uncore, HSW_IDICR, 0, IDIHASHMSK(0xf));
- if (IS_HASWELL(dev_priv))
- I915_WRITE(MI_PREDICATE_RESULT_2, IS_HSW_GT3(dev_priv) ?
- LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
+ if (IS_HASWELL(i915))
+ intel_uncore_write(uncore,
+ MI_PREDICATE_RESULT_2,
+ IS_HSW_GT3(i915) ?
+ LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
/* Apply the GT workarounds... */
- intel_gt_apply_workarounds(&dev_priv->gt);
+ intel_gt_apply_workarounds(gt);
Would it be worth moving the above mmio into workarounds? Whilst you are
doing some spring cleaning :)
To GT workarounds? Are the above two workarounds? Do they have an
official designation?
To intel_gt_workarounds_apply, I'm sure you can find something ;)
Having looked up the docs for HSW_IDCR and MI_PREDICATE_RESULT_2,
neither of the programming looks like workarounds but normal device init
to me. As such I don't see how it would be appropriate to move them into
workarounds.
Where they are is definitely not where they should be. I'm sure I've
complained about this since they were put there. And normal device init ==
workarounds, does it not? It is just a list of registers that need to be
programmed to default values, where those default values were decided
upon after the fact.
Well we could argue.. :) I see stuff in intel_workarounds as having
WaXXXX names, give or take. So I prefer to leave this here for now.
Regards,
Tvrtko
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