== Series Details == Series: series starting with [1/9] drm/i915/gtt: No need to zero the table for page dirs URL : https://patchwork.freedesktop.org/series/61914/ State : warning == Summary == $ dim checkpatch origin/drm-tip 84806e55a140 drm/i915/gtt: No need to zero the table for page dirs 456a07424854 drm/i915/gtt: Use a common type for page directories -:676: CHECK:BRACES: Blank lines aren't necessary after an open brace '{' #676: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1502: gen8_for_each_pml4e(pdp, pml4, start, length, pml4e) { + total: 0 errors, 0 warnings, 1 checks, 1049 lines checked cfdf6893e733 drm/i915/gtt: Introduce init_pd_with_page c8ec1761dc80 drm/i915/gtt: Introduce init_pd 2e057ea8402b drm/i915/gtt: Generalize alloc_pd 72426989ea08 drm/i915/gtt: pde entry encoding is identical -:53: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pd' - possible side-effects? #53: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:731: +#define init_pd(vm, pd, to) { \ + GEM_DEBUG_BUG_ON(!pd_has_phys_page(pd)); \ + fill_px((vm), (pd), gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ + memset_p((pd)->entry, (to), 512); \ } -:53: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects? #53: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:731: +#define init_pd(vm, pd, to) { \ + GEM_DEBUG_BUG_ON(!pd_has_phys_page(pd)); \ + fill_px((vm), (pd), gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ + memset_p((pd)->entry, (to), 512); \ } -:76: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pd' - possible side-effects? #76: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:748: +#define set_pd_entry(pd, pde, to) ({ \ + (pd)->entry[(pde)] = (to); \ + __set_pd_entry((pd), (pde), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ +}) -:76: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pde' - possible side-effects? #76: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:748: +#define set_pd_entry(pd, pde, to) ({ \ + (pd)->entry[(pde)] = (to); \ + __set_pd_entry((pd), (pde), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ +}) -:76: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects? #76: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:748: +#define set_pd_entry(pd, pde, to) ({ \ + (pd)->entry[(pde)] = (to); \ + __set_pd_entry((pd), (pde), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ +}) -:82: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pdp' - possible side-effects? #82: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:754: +#define set_pdp_entry(pdp, pdpe, to) ({ \ + (pdp)->entry[(pdpe)] = (to); \ + if (pd_has_phys_page(pdp)) \ + __set_pd_entry((pdp), (pdpe), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\ +}) -:82: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pdpe' - possible side-effects? #82: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:754: +#define set_pdp_entry(pdp, pdpe, to) ({ \ + (pdp)->entry[(pdpe)] = (to); \ + if (pd_has_phys_page(pdp)) \ + __set_pd_entry((pdp), (pdpe), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\ +}) -:82: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects? #82: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:754: +#define set_pdp_entry(pdp, pdpe, to) ({ \ + (pdp)->entry[(pdpe)] = (to); \ + if (pd_has_phys_page(pdp)) \ + __set_pd_entry((pdp), (pdpe), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\ +}) total: 0 errors, 0 warnings, 8 checks, 232 lines checked 0a1e3ad99009 drm/i915/gtt: Check for physical page for pd entry always 08e4c78a9b99 drm/i915/gtt: Make swapping the pd entry generic -:37: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects? #37: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:772: +#define swap_pd_entry(pd, pde, old, to) \ + __swap_pd_entry((pd), (pde), (old), (to), \ + gen8_pde_encode(px_dma(to), I915_CACHE_LLC)) total: 0 errors, 0 warnings, 1 checks, 65 lines checked 393d891d4aec drm/i915/gtt: Tear down setup and cleanup macros for page dma _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
