On Mon, Jun 10, 2019 at 02:48:19PM -0700, Lucas De Marchi wrote:
> Spec shows voltage level 0 as 307.2, 312, or lower and suggests to use
> range checks. Prepare for having other frequencies in these ranges by
> not comparing the exact frequency.
>
> v2: invert checks by comparing biggest cdclk first (suggested by Ville)
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
lgtm
Series is
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_cdclk.c | 19 +++++--------------
> 1 file changed, 5 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
> index 6988c6cbc362..465a72d185ad 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -1865,21 +1865,12 @@ static void icl_set_cdclk(struct drm_i915_private *dev_priv,
>
> static u8 icl_calc_voltage_level(int cdclk)
> {
> - switch (cdclk) {
> - case 50000:
> - case 307200:
> - case 312000:
> - return 0;
> - case 556800:
> - case 552000:
> - return 1;
> - default:
> - MISSING_CASE(cdclk);
> - /* fall through */
> - case 652800:
> - case 648000:
> + if (cdclk > 556800)
> return 2;
> - }
> + else if (cdclk > 312000)
> + return 1;
> + else
> + return 0;
> }
>
> static void icl_get_cdclk(struct drm_i915_private *dev_priv,
> --
> 2.21.0
--
Ville Syrjälä
Intel
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