On Sat, Jun 08, 2019 at 12:41:10AM +0300, Souza, Jose wrote: > On Tue, 2019-06-04 at 17:58 +0300, Imre Deak wrote: > > Based on a recent BSpec update (Index/21750) we must handle the > > TCCOLD > > event associated with the DP-alt mode. We can detect this event by > > reading an invalid all-1s value from FIA registers. > > > > After detecting TCCOLD we will: > > - fall back to TBT-alt mode when attempting to switch to DP-alt mode > > - conclude that nothing is connected during live status detection > > - WARN when already in unsafe mode, since then TCCOLD is unexpected > > > > Cc: José Roberto de Souza <jose.souza@xxxxxxxxx> > > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_tc.c | 23 +++++++++++++++++++++-- > > 1 file changed, 21 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_tc.c > > b/drivers/gpu/drm/i915/intel_tc.c > > index 84e0c06877ec..d91381c0e87d 100644 > > --- a/drivers/gpu/drm/i915/intel_tc.c > > +++ b/drivers/gpu/drm/i915/intel_tc.c > > @@ -49,6 +49,8 @@ u32 intel_tc_port_get_lane_info(struct > > intel_digital_port *dig_port) > > enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port- > > >base.port); > > u32 lane_info = I915_READ(PORT_TX_DFLEXDPSP); > > > > + WARN_ON(lane_info == -1); > > I would use 0xFFFFFFFF, it could cause a warning in some > compiler(comparing a signed with a unsigned). Shouldn't cause any compiler warnings, since there is a conversion of the types to a common type first, which is unsigned int in this case. That's according to the C standard, so should be fine and it's a short way to write an all-1s value, whatever is on the other side (u32 now, but could be for instance u64). > > Other than that: > Reviewed-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > > > > + > > return (lane_info & DP_LANE_ASSIGNMENT_MASK(tc_port)) >> > > DP_LANE_ASSIGNMENT_SHIFT(tc_port); > > } > > @@ -107,6 +109,12 @@ static u32 tc_port_live_status_mask(struct > > intel_digital_port *dig_port) > > u32 val = I915_READ(PORT_TX_DFLEXDPSP); > > u32 mask = 0; > > > > + if (val == -1) { > > + DRM_DEBUG_DRIVER("Port %s: PHY in TCCOLD, nothing > > connected\n", > > + tc_port_name(dev_priv, tc_port)); > > + return mask; > > + } > > + > > if (val & TC_LIVE_STATE_TBT(tc_port)) > > mask |= BIT(TC_PORT_TBT_ALT); > > if (val & TC_LIVE_STATE_TC(tc_port)) > > @@ -131,13 +139,21 @@ static bool icl_tc_phy_status_complete(struct > > intel_digital_port *dig_port) > > DP_PHY_MODE_STATUS_COMPLETED(tc_port); > > } > > > > -static void icl_tc_phy_set_safe_mode(struct intel_digital_port > > *dig_port, > > +static bool icl_tc_phy_set_safe_mode(struct intel_digital_port > > *dig_port, > > bool enable) > > { > > struct drm_i915_private *dev_priv = to_i915(dig_port- > > >base.base.dev); > > enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port- > > >base.port); > > u32 val = I915_READ(PORT_TX_DFLEXDPCSSS); > > > > + if (val == -1) { > > + DRM_DEBUG_DRIVER("Port %s: PHY in TCCOLD, can't set > > safe-mode to %s\n", > > + tc_port_name(dev_priv, tc_port), > > + enableddisabled(enable)); > > + > > + return false; > > + } > > + > > val &= ~DP_PHY_MODE_STATUS_NOT_SAFE(tc_port); > > if (!enable) > > val |= DP_PHY_MODE_STATUS_NOT_SAFE(tc_port); > > @@ -147,6 +163,8 @@ static void icl_tc_phy_set_safe_mode(struct > > intel_digital_port *dig_port, > > if (enable && wait_for(!icl_tc_phy_status_complete(dig_port), > > 10)) > > DRM_DEBUG_DRIVER("Port %s: PHY complete clear timed > > out\n", > > tc_port_name(dev_priv, tc_port)); > > + > > + return true; > > } > > > > /* > > @@ -187,7 +205,8 @@ static bool icl_tc_phy_connect(struct > > intel_digital_port *dig_port) > > return false; > > } > > > > - icl_tc_phy_set_safe_mode(dig_port, false); > > + if (!icl_tc_phy_set_safe_mode(dig_port, false)) > > + return false; > > > > if (dig_port->tc_mode == TC_PORT_LEGACY) > > return true; _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx