== Series Details == Series: series starting with [CI,1/5] drm/i915: Reset only affected engines when handling error capture URL : https://patchwork.freedesktop.org/series/61758/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9a057903722f drm/i915: Reset only affected engines when handling error capture 2467bef6dc38 drm/i915: Tidy engine mask types in hangcheck e71b4d115e62 drm/i915: Make Gen6/7 RING_FAULT_REG access engine centric -:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'engine__' - possible side-effects? #21: FILE: drivers/gpu/drm/i915/gt/intel_engine.h:71: +#define GEN6_RING_FAULT_REG_READ(engine__) \ + intel_uncore_read((engine__)->uncore, RING_FAULT_REG(engine__)) -:24: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'engine__' - possible side-effects? #24: FILE: drivers/gpu/drm/i915/gt/intel_engine.h:74: +#define GEN6_RING_FAULT_REG_POSTING_READ(engine__) \ + intel_uncore_posting_read((engine__)->uncore, RING_FAULT_REG(engine__)) -:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'engine__' - possible side-effects? #27: FILE: drivers/gpu/drm/i915/gt/intel_engine.h:77: +#define GEN6_RING_FAULT_REG_RMW(engine__, clear__, set__) \ +({ \ + u32 __val; \ +\ + __val = intel_uncore_read((engine__)->uncore, \ + RING_FAULT_REG(engine__)); \ + __val &= ~clear__; \ + __val |= set__; \ + intel_uncore_write((engine__)->uncore, RING_FAULT_REG(engine__), \ + __val); \ +}) -:27: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'clear__' may be better as '(clear__)' to avoid precedence issues #27: FILE: drivers/gpu/drm/i915/gt/intel_engine.h:77: +#define GEN6_RING_FAULT_REG_RMW(engine__, clear__, set__) \ +({ \ + u32 __val; \ +\ + __val = intel_uncore_read((engine__)->uncore, \ + RING_FAULT_REG(engine__)); \ + __val &= ~clear__; \ + __val |= set__; \ + intel_uncore_write((engine__)->uncore, RING_FAULT_REG(engine__), \ + __val); \ +}) total: 0 errors, 0 warnings, 4 checks, 52 lines checked bcda7ed91c02 drm/i915: Extract engine fault reset to a helper 1390b7f7f35b drm/i915: Unexport i915_gem_init/fini_aliasing_ppgtt _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
